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This moves all the header files related to the abx500 family into a common include directory below mfd. From now on we place any subchip header in that directory. Headers previously in e.g. <linux/mfd/ab8500/gpio.h> get prefixed and are now e.g. <linux/mfd/abx500/ab8500-gpio.h>. The top-level abstract interface remains in <linux/mfd/abx500.h>. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
677 lines
19 KiB
C
677 lines
19 KiB
C
/*
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* Copyright (C) ST-Ericsson SA 2010
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*
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* License Terms: GNU General Public License v2
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* Author: Arun R Murthy <arun.murthy@stericsson.com>
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* Author: Daniel Willerud <daniel.willerud@stericsson.com>
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* Author: Johan Palsson <johan.palsson@stericsson.com>
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/completion.h>
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#include <linux/regulator/consumer.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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#include <linux/list.h>
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#include <linux/mfd/abx500.h>
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#include <linux/mfd/abx500/ab8500.h>
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#include <linux/mfd/abx500/ab8500-gpadc.h>
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/*
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* GPADC register offsets
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* Bank : 0x0A
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*/
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#define AB8500_GPADC_CTRL1_REG 0x00
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#define AB8500_GPADC_CTRL2_REG 0x01
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#define AB8500_GPADC_CTRL3_REG 0x02
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#define AB8500_GPADC_AUTO_TIMER_REG 0x03
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#define AB8500_GPADC_STAT_REG 0x04
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#define AB8500_GPADC_MANDATAL_REG 0x05
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#define AB8500_GPADC_MANDATAH_REG 0x06
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#define AB8500_GPADC_AUTODATAL_REG 0x07
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#define AB8500_GPADC_AUTODATAH_REG 0x08
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#define AB8500_GPADC_MUX_CTRL_REG 0x09
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/*
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* OTP register offsets
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* Bank : 0x15
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*/
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#define AB8500_GPADC_CAL_1 0x0F
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#define AB8500_GPADC_CAL_2 0x10
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#define AB8500_GPADC_CAL_3 0x11
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#define AB8500_GPADC_CAL_4 0x12
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#define AB8500_GPADC_CAL_5 0x13
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#define AB8500_GPADC_CAL_6 0x14
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#define AB8500_GPADC_CAL_7 0x15
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/* gpadc constants */
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#define EN_VINTCORE12 0x04
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#define EN_VTVOUT 0x02
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#define EN_GPADC 0x01
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#define DIS_GPADC 0x00
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#define SW_AVG_16 0x60
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#define ADC_SW_CONV 0x04
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#define EN_ICHAR 0x80
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#define BTEMP_PULL_UP 0x08
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#define EN_BUF 0x40
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#define DIS_ZERO 0x00
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#define GPADC_BUSY 0x01
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/* GPADC constants from AB8500 spec, UM0836 */
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#define ADC_RESOLUTION 1024
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#define ADC_CH_BTEMP_MIN 0
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#define ADC_CH_BTEMP_MAX 1350
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#define ADC_CH_DIETEMP_MIN 0
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#define ADC_CH_DIETEMP_MAX 1350
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#define ADC_CH_CHG_V_MIN 0
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#define ADC_CH_CHG_V_MAX 20030
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#define ADC_CH_ACCDET2_MIN 0
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#define ADC_CH_ACCDET2_MAX 2500
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#define ADC_CH_VBAT_MIN 2300
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#define ADC_CH_VBAT_MAX 4800
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#define ADC_CH_CHG_I_MIN 0
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#define ADC_CH_CHG_I_MAX 1500
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#define ADC_CH_BKBAT_MIN 0
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#define ADC_CH_BKBAT_MAX 3200
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/* This is used to not lose precision when dividing to get gain and offset */
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#define CALIB_SCALE 1000
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enum cal_channels {
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ADC_INPUT_VMAIN = 0,
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ADC_INPUT_BTEMP,
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ADC_INPUT_VBAT,
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NBR_CAL_INPUTS,
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};
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/**
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* struct adc_cal_data - Table for storing gain and offset for the calibrated
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* ADC channels
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* @gain: Gain of the ADC channel
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* @offset: Offset of the ADC channel
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*/
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struct adc_cal_data {
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u64 gain;
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u64 offset;
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};
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/**
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* struct ab8500_gpadc - AB8500 GPADC device information
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* @chip_id ABB chip id
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* @dev: pointer to the struct device
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* @node: a list of AB8500 GPADCs, hence prepared for
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reentrance
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* @ab8500_gpadc_complete: pointer to the struct completion, to indicate
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* the completion of gpadc conversion
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* @ab8500_gpadc_lock: structure of type mutex
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* @regu: pointer to the struct regulator
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* @irq: interrupt number that is used by gpadc
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* @cal_data array of ADC calibration data structs
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*/
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struct ab8500_gpadc {
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u8 chip_id;
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struct device *dev;
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struct list_head node;
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struct completion ab8500_gpadc_complete;
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struct mutex ab8500_gpadc_lock;
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struct regulator *regu;
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int irq;
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struct adc_cal_data cal_data[NBR_CAL_INPUTS];
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};
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static LIST_HEAD(ab8500_gpadc_list);
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/**
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* ab8500_gpadc_get() - returns a reference to the primary AB8500 GPADC
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* (i.e. the first GPADC in the instance list)
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*/
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struct ab8500_gpadc *ab8500_gpadc_get(char *name)
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{
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struct ab8500_gpadc *gpadc;
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list_for_each_entry(gpadc, &ab8500_gpadc_list, node) {
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if (!strcmp(name, dev_name(gpadc->dev)))
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return gpadc;
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}
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return ERR_PTR(-ENOENT);
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}
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EXPORT_SYMBOL(ab8500_gpadc_get);
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/**
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* ab8500_gpadc_ad_to_voltage() - Convert a raw ADC value to a voltage
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*/
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int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, u8 channel,
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int ad_value)
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{
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int res;
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switch (channel) {
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case MAIN_CHARGER_V:
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/* For some reason we don't have calibrated data */
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if (!gpadc->cal_data[ADC_INPUT_VMAIN].gain) {
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res = ADC_CH_CHG_V_MIN + (ADC_CH_CHG_V_MAX -
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ADC_CH_CHG_V_MIN) * ad_value /
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ADC_RESOLUTION;
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break;
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}
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/* Here we can use the calibrated data */
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res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VMAIN].gain +
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gpadc->cal_data[ADC_INPUT_VMAIN].offset) / CALIB_SCALE;
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break;
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case BAT_CTRL:
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case BTEMP_BALL:
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case ACC_DETECT1:
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case ADC_AUX1:
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case ADC_AUX2:
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/* For some reason we don't have calibrated data */
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if (!gpadc->cal_data[ADC_INPUT_BTEMP].gain) {
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res = ADC_CH_BTEMP_MIN + (ADC_CH_BTEMP_MAX -
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ADC_CH_BTEMP_MIN) * ad_value /
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ADC_RESOLUTION;
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break;
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}
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/* Here we can use the calibrated data */
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res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_BTEMP].gain +
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gpadc->cal_data[ADC_INPUT_BTEMP].offset) / CALIB_SCALE;
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break;
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case MAIN_BAT_V:
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/* For some reason we don't have calibrated data */
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if (!gpadc->cal_data[ADC_INPUT_VBAT].gain) {
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res = ADC_CH_VBAT_MIN + (ADC_CH_VBAT_MAX -
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ADC_CH_VBAT_MIN) * ad_value /
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ADC_RESOLUTION;
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break;
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}
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/* Here we can use the calibrated data */
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res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VBAT].gain +
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gpadc->cal_data[ADC_INPUT_VBAT].offset) / CALIB_SCALE;
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break;
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case DIE_TEMP:
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res = ADC_CH_DIETEMP_MIN +
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(ADC_CH_DIETEMP_MAX - ADC_CH_DIETEMP_MIN) * ad_value /
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ADC_RESOLUTION;
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break;
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case ACC_DETECT2:
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res = ADC_CH_ACCDET2_MIN +
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(ADC_CH_ACCDET2_MAX - ADC_CH_ACCDET2_MIN) * ad_value /
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ADC_RESOLUTION;
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break;
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case VBUS_V:
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res = ADC_CH_CHG_V_MIN +
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(ADC_CH_CHG_V_MAX - ADC_CH_CHG_V_MIN) * ad_value /
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ADC_RESOLUTION;
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break;
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case MAIN_CHARGER_C:
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case USB_CHARGER_C:
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res = ADC_CH_CHG_I_MIN +
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(ADC_CH_CHG_I_MAX - ADC_CH_CHG_I_MIN) * ad_value /
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ADC_RESOLUTION;
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break;
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case BK_BAT_V:
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res = ADC_CH_BKBAT_MIN +
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(ADC_CH_BKBAT_MAX - ADC_CH_BKBAT_MIN) * ad_value /
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ADC_RESOLUTION;
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break;
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default:
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dev_err(gpadc->dev,
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"unknown channel, not possible to convert\n");
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res = -EINVAL;
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break;
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}
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return res;
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}
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EXPORT_SYMBOL(ab8500_gpadc_ad_to_voltage);
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/**
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* ab8500_gpadc_convert() - gpadc conversion
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* @channel: analog channel to be converted to digital data
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*
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* This function converts the selected analog i/p to digital
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* data.
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*/
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int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 channel)
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{
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int ad_value;
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int voltage;
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ad_value = ab8500_gpadc_read_raw(gpadc, channel);
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if (ad_value < 0) {
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dev_err(gpadc->dev, "GPADC raw value failed ch: %d\n", channel);
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return ad_value;
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}
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voltage = ab8500_gpadc_ad_to_voltage(gpadc, channel, ad_value);
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if (voltage < 0)
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dev_err(gpadc->dev, "GPADC to voltage conversion failed ch:"
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" %d AD: 0x%x\n", channel, ad_value);
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return voltage;
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}
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EXPORT_SYMBOL(ab8500_gpadc_convert);
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/**
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* ab8500_gpadc_read_raw() - gpadc read
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* @channel: analog channel to be read
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*
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* This function obtains the raw ADC value, this then needs
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* to be converted by calling ab8500_gpadc_ad_to_voltage()
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*/
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int ab8500_gpadc_read_raw(struct ab8500_gpadc *gpadc, u8 channel)
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{
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int ret;
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int looplimit = 0;
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u8 val, low_data, high_data;
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if (!gpadc)
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return -ENODEV;
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mutex_lock(&gpadc->ab8500_gpadc_lock);
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/* Enable VTVout LDO this is required for GPADC */
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regulator_enable(gpadc->regu);
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/* Check if ADC is not busy, lock and proceed */
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do {
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ret = abx500_get_register_interruptible(gpadc->dev,
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AB8500_GPADC, AB8500_GPADC_STAT_REG, &val);
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if (ret < 0)
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goto out;
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if (!(val & GPADC_BUSY))
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break;
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msleep(10);
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} while (++looplimit < 10);
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if (looplimit >= 10 && (val & GPADC_BUSY)) {
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dev_err(gpadc->dev, "gpadc_conversion: GPADC busy");
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ret = -EINVAL;
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goto out;
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}
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/* Enable GPADC */
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ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
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AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_GPADC, EN_GPADC);
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if (ret < 0) {
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dev_err(gpadc->dev, "gpadc_conversion: enable gpadc failed\n");
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goto out;
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}
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/* Select the channel source and set average samples to 16 */
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ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
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AB8500_GPADC_CTRL2_REG, (channel | SW_AVG_16));
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if (ret < 0) {
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dev_err(gpadc->dev,
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"gpadc_conversion: set avg samples failed\n");
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goto out;
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}
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/*
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* Enable ADC, buffering, select rising edge and enable ADC path
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* charging current sense if it needed, ABB 3.0 needs some special
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* treatment too.
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*/
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switch (channel) {
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case MAIN_CHARGER_C:
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case USB_CHARGER_C:
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ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
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AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
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EN_BUF | EN_ICHAR,
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EN_BUF | EN_ICHAR);
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break;
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case BTEMP_BALL:
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if (gpadc->chip_id >= AB8500_CUT3P0) {
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/* Turn on btemp pull-up on ABB 3.0 */
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ret = abx500_mask_and_set_register_interruptible(
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gpadc->dev,
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AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
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EN_BUF | BTEMP_PULL_UP,
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EN_BUF | BTEMP_PULL_UP);
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/*
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* Delay might be needed for ABB8500 cut 3.0, if not, remove
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* when hardware will be availible
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*/
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msleep(1);
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break;
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}
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/* Intentional fallthrough */
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default:
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ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
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AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_BUF, EN_BUF);
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break;
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}
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if (ret < 0) {
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dev_err(gpadc->dev,
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"gpadc_conversion: select falling edge failed\n");
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goto out;
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}
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ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
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AB8500_GPADC, AB8500_GPADC_CTRL1_REG, ADC_SW_CONV, ADC_SW_CONV);
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if (ret < 0) {
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dev_err(gpadc->dev,
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"gpadc_conversion: start s/w conversion failed\n");
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goto out;
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}
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/* wait for completion of conversion */
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if (!wait_for_completion_timeout(&gpadc->ab8500_gpadc_complete, 2*HZ)) {
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dev_err(gpadc->dev,
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"timeout: didn't receive GPADC conversion interrupt\n");
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ret = -EINVAL;
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goto out;
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}
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/* Read the converted RAW data */
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ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
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AB8500_GPADC_MANDATAL_REG, &low_data);
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if (ret < 0) {
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dev_err(gpadc->dev, "gpadc_conversion: read low data failed\n");
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goto out;
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}
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ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
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AB8500_GPADC_MANDATAH_REG, &high_data);
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if (ret < 0) {
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dev_err(gpadc->dev,
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"gpadc_conversion: read high data failed\n");
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goto out;
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}
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/* Disable GPADC */
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ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
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AB8500_GPADC_CTRL1_REG, DIS_GPADC);
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if (ret < 0) {
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dev_err(gpadc->dev, "gpadc_conversion: disable gpadc failed\n");
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goto out;
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}
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/* Disable VTVout LDO this is required for GPADC */
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regulator_disable(gpadc->regu);
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mutex_unlock(&gpadc->ab8500_gpadc_lock);
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return (high_data << 8) | low_data;
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out:
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/*
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* It has shown to be needed to turn off the GPADC if an error occurs,
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* otherwise we might have problem when waiting for the busy bit in the
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* GPADC status register to go low. In V1.1 there wait_for_completion
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* seems to timeout when waiting for an interrupt.. Not seen in V2.0
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*/
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(void) abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
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AB8500_GPADC_CTRL1_REG, DIS_GPADC);
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regulator_disable(gpadc->regu);
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mutex_unlock(&gpadc->ab8500_gpadc_lock);
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dev_err(gpadc->dev,
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"gpadc_conversion: Failed to AD convert channel %d\n", channel);
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return ret;
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}
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EXPORT_SYMBOL(ab8500_gpadc_read_raw);
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/**
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* ab8500_bm_gpswadcconvend_handler() - isr for s/w gpadc conversion completion
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* @irq: irq number
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* @data: pointer to the data passed during request irq
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*
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* This is a interrupt service routine for s/w gpadc conversion completion.
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* Notifies the gpadc completion is completed and the converted raw value
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* can be read from the registers.
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* Returns IRQ status(IRQ_HANDLED)
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*/
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static irqreturn_t ab8500_bm_gpswadcconvend_handler(int irq, void *_gpadc)
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{
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struct ab8500_gpadc *gpadc = _gpadc;
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complete(&gpadc->ab8500_gpadc_complete);
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return IRQ_HANDLED;
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}
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static int otp_cal_regs[] = {
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AB8500_GPADC_CAL_1,
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AB8500_GPADC_CAL_2,
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AB8500_GPADC_CAL_3,
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AB8500_GPADC_CAL_4,
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AB8500_GPADC_CAL_5,
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AB8500_GPADC_CAL_6,
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AB8500_GPADC_CAL_7,
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};
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static void ab8500_gpadc_read_calibration_data(struct ab8500_gpadc *gpadc)
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{
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int i;
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int ret[ARRAY_SIZE(otp_cal_regs)];
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u8 gpadc_cal[ARRAY_SIZE(otp_cal_regs)];
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int vmain_high, vmain_low;
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int btemp_high, btemp_low;
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int vbat_high, vbat_low;
|
|
|
|
/* First we read all OTP registers and store the error code */
|
|
for (i = 0; i < ARRAY_SIZE(otp_cal_regs); i++) {
|
|
ret[i] = abx500_get_register_interruptible(gpadc->dev,
|
|
AB8500_OTP_EMUL, otp_cal_regs[i], &gpadc_cal[i]);
|
|
if (ret[i] < 0)
|
|
dev_err(gpadc->dev, "%s: read otp reg 0x%02x failed\n",
|
|
__func__, otp_cal_regs[i]);
|
|
}
|
|
|
|
/*
|
|
* The ADC calibration data is stored in OTP registers.
|
|
* The layout of the calibration data is outlined below and a more
|
|
* detailed description can be found in UM0836
|
|
*
|
|
* vm_h/l = vmain_high/low
|
|
* bt_h/l = btemp_high/low
|
|
* vb_h/l = vbat_high/low
|
|
*
|
|
* Data bits:
|
|
* | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
|
|
* |.......|.......|.......|.......|.......|.......|.......|.......
|
|
* | | vm_h9 | vm_h8
|
|
* |.......|.......|.......|.......|.......|.......|.......|.......
|
|
* | | vm_h7 | vm_h6 | vm_h5 | vm_h4 | vm_h3 | vm_h2
|
|
* |.......|.......|.......|.......|.......|.......|.......|.......
|
|
* | vm_h1 | vm_h0 | vm_l4 | vm_l3 | vm_l2 | vm_l1 | vm_l0 | bt_h9
|
|
* |.......|.......|.......|.......|.......|.......|.......|.......
|
|
* | bt_h8 | bt_h7 | bt_h6 | bt_h5 | bt_h4 | bt_h3 | bt_h2 | bt_h1
|
|
* |.......|.......|.......|.......|.......|.......|.......|.......
|
|
* | bt_h0 | bt_l4 | bt_l3 | bt_l2 | bt_l1 | bt_l0 | vb_h9 | vb_h8
|
|
* |.......|.......|.......|.......|.......|.......|.......|.......
|
|
* | vb_h7 | vb_h6 | vb_h5 | vb_h4 | vb_h3 | vb_h2 | vb_h1 | vb_h0
|
|
* |.......|.......|.......|.......|.......|.......|.......|.......
|
|
* | vb_l5 | vb_l4 | vb_l3 | vb_l2 | vb_l1 | vb_l0 |
|
|
* |.......|.......|.......|.......|.......|.......|.......|.......
|
|
*
|
|
*
|
|
* Ideal output ADC codes corresponding to injected input voltages
|
|
* during manufacturing is:
|
|
*
|
|
* vmain_high: Vin = 19500mV / ADC ideal code = 997
|
|
* vmain_low: Vin = 315mV / ADC ideal code = 16
|
|
* btemp_high: Vin = 1300mV / ADC ideal code = 985
|
|
* btemp_low: Vin = 21mV / ADC ideal code = 16
|
|
* vbat_high: Vin = 4700mV / ADC ideal code = 982
|
|
* vbat_low: Vin = 2380mV / ADC ideal code = 33
|
|
*/
|
|
|
|
/* Calculate gain and offset for VMAIN if all reads succeeded */
|
|
if (!(ret[0] < 0 || ret[1] < 0 || ret[2] < 0)) {
|
|
vmain_high = (((gpadc_cal[0] & 0x03) << 8) |
|
|
((gpadc_cal[1] & 0x3F) << 2) |
|
|
((gpadc_cal[2] & 0xC0) >> 6));
|
|
|
|
vmain_low = ((gpadc_cal[2] & 0x3E) >> 1);
|
|
|
|
gpadc->cal_data[ADC_INPUT_VMAIN].gain = CALIB_SCALE *
|
|
(19500 - 315) / (vmain_high - vmain_low);
|
|
|
|
gpadc->cal_data[ADC_INPUT_VMAIN].offset = CALIB_SCALE * 19500 -
|
|
(CALIB_SCALE * (19500 - 315) /
|
|
(vmain_high - vmain_low)) * vmain_high;
|
|
} else {
|
|
gpadc->cal_data[ADC_INPUT_VMAIN].gain = 0;
|
|
}
|
|
|
|
/* Calculate gain and offset for BTEMP if all reads succeeded */
|
|
if (!(ret[2] < 0 || ret[3] < 0 || ret[4] < 0)) {
|
|
btemp_high = (((gpadc_cal[2] & 0x01) << 9) |
|
|
(gpadc_cal[3] << 1) |
|
|
((gpadc_cal[4] & 0x80) >> 7));
|
|
|
|
btemp_low = ((gpadc_cal[4] & 0x7C) >> 2);
|
|
|
|
gpadc->cal_data[ADC_INPUT_BTEMP].gain =
|
|
CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low);
|
|
|
|
gpadc->cal_data[ADC_INPUT_BTEMP].offset = CALIB_SCALE * 1300 -
|
|
(CALIB_SCALE * (1300 - 21) /
|
|
(btemp_high - btemp_low)) * btemp_high;
|
|
} else {
|
|
gpadc->cal_data[ADC_INPUT_BTEMP].gain = 0;
|
|
}
|
|
|
|
/* Calculate gain and offset for VBAT if all reads succeeded */
|
|
if (!(ret[4] < 0 || ret[5] < 0 || ret[6] < 0)) {
|
|
vbat_high = (((gpadc_cal[4] & 0x03) << 8) | gpadc_cal[5]);
|
|
vbat_low = ((gpadc_cal[6] & 0xFC) >> 2);
|
|
|
|
gpadc->cal_data[ADC_INPUT_VBAT].gain = CALIB_SCALE *
|
|
(4700 - 2380) / (vbat_high - vbat_low);
|
|
|
|
gpadc->cal_data[ADC_INPUT_VBAT].offset = CALIB_SCALE * 4700 -
|
|
(CALIB_SCALE * (4700 - 2380) /
|
|
(vbat_high - vbat_low)) * vbat_high;
|
|
} else {
|
|
gpadc->cal_data[ADC_INPUT_VBAT].gain = 0;
|
|
}
|
|
|
|
dev_dbg(gpadc->dev, "VMAIN gain %llu offset %llu\n",
|
|
gpadc->cal_data[ADC_INPUT_VMAIN].gain,
|
|
gpadc->cal_data[ADC_INPUT_VMAIN].offset);
|
|
|
|
dev_dbg(gpadc->dev, "BTEMP gain %llu offset %llu\n",
|
|
gpadc->cal_data[ADC_INPUT_BTEMP].gain,
|
|
gpadc->cal_data[ADC_INPUT_BTEMP].offset);
|
|
|
|
dev_dbg(gpadc->dev, "VBAT gain %llu offset %llu\n",
|
|
gpadc->cal_data[ADC_INPUT_VBAT].gain,
|
|
gpadc->cal_data[ADC_INPUT_VBAT].offset);
|
|
}
|
|
|
|
static int __devinit ab8500_gpadc_probe(struct platform_device *pdev)
|
|
{
|
|
int ret = 0;
|
|
struct ab8500_gpadc *gpadc;
|
|
|
|
gpadc = kzalloc(sizeof(struct ab8500_gpadc), GFP_KERNEL);
|
|
if (!gpadc) {
|
|
dev_err(&pdev->dev, "Error: No memory\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
gpadc->irq = platform_get_irq_byname(pdev, "SW_CONV_END");
|
|
if (gpadc->irq < 0) {
|
|
dev_err(gpadc->dev, "failed to get platform irq-%d\n",
|
|
gpadc->irq);
|
|
ret = gpadc->irq;
|
|
goto fail;
|
|
}
|
|
|
|
gpadc->dev = &pdev->dev;
|
|
mutex_init(&gpadc->ab8500_gpadc_lock);
|
|
|
|
/* Initialize completion used to notify completion of conversion */
|
|
init_completion(&gpadc->ab8500_gpadc_complete);
|
|
|
|
/* Register interrupt - SwAdcComplete */
|
|
ret = request_threaded_irq(gpadc->irq, NULL,
|
|
ab8500_bm_gpswadcconvend_handler,
|
|
IRQF_NO_SUSPEND | IRQF_SHARED, "ab8500-gpadc", gpadc);
|
|
if (ret < 0) {
|
|
dev_err(gpadc->dev, "Failed to register interrupt, irq: %d\n",
|
|
gpadc->irq);
|
|
goto fail;
|
|
}
|
|
|
|
/* Get Chip ID of the ABB ASIC */
|
|
ret = abx500_get_chip_id(gpadc->dev);
|
|
if (ret < 0) {
|
|
dev_err(gpadc->dev, "failed to get chip ID\n");
|
|
goto fail_irq;
|
|
}
|
|
gpadc->chip_id = (u8) ret;
|
|
|
|
/* VTVout LDO used to power up ab8500-GPADC */
|
|
gpadc->regu = regulator_get(&pdev->dev, "vddadc");
|
|
if (IS_ERR(gpadc->regu)) {
|
|
ret = PTR_ERR(gpadc->regu);
|
|
dev_err(gpadc->dev, "failed to get vtvout LDO\n");
|
|
goto fail_irq;
|
|
}
|
|
ab8500_gpadc_read_calibration_data(gpadc);
|
|
list_add_tail(&gpadc->node, &ab8500_gpadc_list);
|
|
dev_dbg(gpadc->dev, "probe success\n");
|
|
return 0;
|
|
fail_irq:
|
|
free_irq(gpadc->irq, gpadc);
|
|
fail:
|
|
kfree(gpadc);
|
|
gpadc = NULL;
|
|
return ret;
|
|
}
|
|
|
|
static int __devexit ab8500_gpadc_remove(struct platform_device *pdev)
|
|
{
|
|
struct ab8500_gpadc *gpadc = platform_get_drvdata(pdev);
|
|
|
|
/* remove this gpadc entry from the list */
|
|
list_del(&gpadc->node);
|
|
/* remove interrupt - completion of Sw ADC conversion */
|
|
free_irq(gpadc->irq, gpadc);
|
|
/* disable VTVout LDO that is being used by GPADC */
|
|
regulator_put(gpadc->regu);
|
|
kfree(gpadc);
|
|
gpadc = NULL;
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver ab8500_gpadc_driver = {
|
|
.probe = ab8500_gpadc_probe,
|
|
.remove = __devexit_p(ab8500_gpadc_remove),
|
|
.driver = {
|
|
.name = "ab8500-gpadc",
|
|
.owner = THIS_MODULE,
|
|
},
|
|
};
|
|
|
|
static int __init ab8500_gpadc_init(void)
|
|
{
|
|
return platform_driver_register(&ab8500_gpadc_driver);
|
|
}
|
|
|
|
static void __exit ab8500_gpadc_exit(void)
|
|
{
|
|
platform_driver_unregister(&ab8500_gpadc_driver);
|
|
}
|
|
|
|
subsys_initcall_sync(ab8500_gpadc_init);
|
|
module_exit(ab8500_gpadc_exit);
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_AUTHOR("Arun R Murthy, Daniel Willerud, Johan Palsson");
|
|
MODULE_ALIAS("platform:ab8500_gpadc");
|
|
MODULE_DESCRIPTION("AB8500 GPADC driver");
|