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8e30538eca
The dma_map_single() doesn't permit zero length mapping. It causes a follow panic. A panic was reported on arm64: [ 60.137988] ------------[ cut here ]------------ [ 60.142630] kernel BUG at kernel/dma/swiotlb.c:624! [ 60.147508] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP [ 60.152992] Modules linked in: dw_hdmi_cec crct10dif_ce simple_bridge rcar_fdp1 vsp1 rcar_vin videobuf2_vmalloc rcar_csi2 v4l 2_mem2mem videobuf2_dma_contig videobuf2_memops pci_endpoint_test videobuf2_v4l2 videobuf2_common rcar_fcp v4l2_fwnode v4l2_asyn c videodev mc gpio_bd9571mwv max9611 pwm_rcar ccree at24 authenc libdes phy_rcar_gen3_usb3 usb_dmac display_connector pwm_bl [ 60.186252] CPU: 0 PID: 508 Comm: pcitest Not tainted 6.0.0-rc1rpci-dev+ #237 [ 60.193387] Hardware name: Renesas Salvator-X 2nd version board based on r8a77951 (DT) [ 60.201302] pstate: 00000005 (nzcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 60.208263] pc : swiotlb_tbl_map_single+0x2c0/0x590 [ 60.213149] lr : swiotlb_map+0x88/0x1f0 [ 60.216982] sp : ffff80000a883bc0 [ 60.220292] x29: ffff80000a883bc0 x28: 0000000000000000 x27: 0000000000000000 [ 60.227430] x26: 0000000000000000 x25: ffff0004c0da20d0 x24: ffff80000a1f77c0 [ 60.234567] x23: 0000000000000002 x22: 0001000040000010 x21: 000000007a000000 [ 60.241703] x20: 0000000000200000 x19: 0000000000000000 x18: 0000000000000000 [ 60.248840] x17: 0000000000000000 x16: 0000000000000000 x15: ffff0006ff7b9180 [ 60.255977] x14: ffff0006ff7b9180 x13: 0000000000000000 x12: 0000000000000000 [ 60.263113] x11: 0000000000000000 x10: 0000000000000000 x9 : 0000000000000000 [ 60.270249] x8 : 0001000000000010 x7 : ffff0004c6754b20 x6 : 0000000000000000 [ 60.277385] x5 : ffff0004c0da2090 x4 : 0000000000000000 x3 : 0000000000000001 [ 60.284521] x2 : 0000000040000000 x1 : 0000000000000000 x0 : 0000000040000010 [ 60.291658] Call trace: [ 60.294100] swiotlb_tbl_map_single+0x2c0/0x590 [ 60.298629] swiotlb_map+0x88/0x1f0 [ 60.302115] dma_map_page_attrs+0x188/0x230 [ 60.306299] pci_endpoint_test_ioctl+0x5e4/0xd90 [pci_endpoint_test] [ 60.312660] __arm64_sys_ioctl+0xa8/0xf0 [ 60.316583] invoke_syscall+0x44/0x108 [ 60.320334] el0_svc_common.constprop.0+0xcc/0xf0 [ 60.325038] do_el0_svc+0x2c/0xb8 [ 60.328351] el0_svc+0x2c/0x88 [ 60.331406] el0t_64_sync_handler+0xb8/0xc0 [ 60.335587] el0t_64_sync+0x18c/0x190 [ 60.339251] Code:52800013
d2e00414 35fff45c d503201f (d4210000) [ 60.345344] ---[ end trace 0000000000000000 ]--- To fix it, this patch adds a checking the payload length if it is zero. Fixes:343dc693f7
("misc: pci_endpoint_test: Prevent some integer overflows") Cc: stable <stable@kernel.org> Signed-off-by: Shunsuke Mie <mie@igel.co.jp> Link: https://lore.kernel.org/r/20220907020100.122588-2-mie@igel.co.jp Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
1019 lines
25 KiB
C
1019 lines
25 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/**
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* Host side test driver to test endpoint functionality
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*
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* Copyright (C) 2017 Texas Instruments
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* Author: Kishon Vijay Abraham I <kishon@ti.com>
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*/
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#include <linux/crc32.h>
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#include <linux/delay.h>
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#include <linux/fs.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/miscdevice.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/random.h>
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#include <linux/slab.h>
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#include <linux/uaccess.h>
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/pci_regs.h>
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#include <uapi/linux/pcitest.h>
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#define DRV_MODULE_NAME "pci-endpoint-test"
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#define IRQ_TYPE_UNDEFINED -1
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#define IRQ_TYPE_LEGACY 0
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#define IRQ_TYPE_MSI 1
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#define IRQ_TYPE_MSIX 2
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#define PCI_ENDPOINT_TEST_MAGIC 0x0
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#define PCI_ENDPOINT_TEST_COMMAND 0x4
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#define COMMAND_RAISE_LEGACY_IRQ BIT(0)
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#define COMMAND_RAISE_MSI_IRQ BIT(1)
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#define COMMAND_RAISE_MSIX_IRQ BIT(2)
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#define COMMAND_READ BIT(3)
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#define COMMAND_WRITE BIT(4)
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#define COMMAND_COPY BIT(5)
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#define PCI_ENDPOINT_TEST_STATUS 0x8
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#define STATUS_READ_SUCCESS BIT(0)
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#define STATUS_READ_FAIL BIT(1)
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#define STATUS_WRITE_SUCCESS BIT(2)
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#define STATUS_WRITE_FAIL BIT(3)
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#define STATUS_COPY_SUCCESS BIT(4)
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#define STATUS_COPY_FAIL BIT(5)
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#define STATUS_IRQ_RAISED BIT(6)
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#define STATUS_SRC_ADDR_INVALID BIT(7)
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#define STATUS_DST_ADDR_INVALID BIT(8)
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#define PCI_ENDPOINT_TEST_LOWER_SRC_ADDR 0x0c
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#define PCI_ENDPOINT_TEST_UPPER_SRC_ADDR 0x10
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#define PCI_ENDPOINT_TEST_LOWER_DST_ADDR 0x14
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#define PCI_ENDPOINT_TEST_UPPER_DST_ADDR 0x18
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#define PCI_ENDPOINT_TEST_SIZE 0x1c
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#define PCI_ENDPOINT_TEST_CHECKSUM 0x20
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#define PCI_ENDPOINT_TEST_IRQ_TYPE 0x24
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#define PCI_ENDPOINT_TEST_IRQ_NUMBER 0x28
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#define PCI_ENDPOINT_TEST_FLAGS 0x2c
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#define FLAG_USE_DMA BIT(0)
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#define PCI_DEVICE_ID_TI_AM654 0xb00c
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#define PCI_DEVICE_ID_TI_J7200 0xb00f
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#define PCI_DEVICE_ID_TI_AM64 0xb010
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#define PCI_DEVICE_ID_LS1088A 0x80c0
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#define is_am654_pci_dev(pdev) \
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((pdev)->device == PCI_DEVICE_ID_TI_AM654)
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#define PCI_DEVICE_ID_RENESAS_R8A774A1 0x0028
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#define PCI_DEVICE_ID_RENESAS_R8A774B1 0x002b
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#define PCI_DEVICE_ID_RENESAS_R8A774C0 0x002d
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#define PCI_DEVICE_ID_RENESAS_R8A774E1 0x0025
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static DEFINE_IDA(pci_endpoint_test_ida);
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#define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \
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miscdev)
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static bool no_msi;
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module_param(no_msi, bool, 0444);
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MODULE_PARM_DESC(no_msi, "Disable MSI interrupt in pci_endpoint_test");
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static int irq_type = IRQ_TYPE_MSI;
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module_param(irq_type, int, 0444);
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MODULE_PARM_DESC(irq_type, "IRQ mode selection in pci_endpoint_test (0 - Legacy, 1 - MSI, 2 - MSI-X)");
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enum pci_barno {
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BAR_0,
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BAR_1,
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BAR_2,
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BAR_3,
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BAR_4,
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BAR_5,
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};
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struct pci_endpoint_test {
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struct pci_dev *pdev;
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void __iomem *base;
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void __iomem *bar[PCI_STD_NUM_BARS];
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struct completion irq_raised;
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int last_irq;
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int num_irqs;
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int irq_type;
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/* mutex to protect the ioctls */
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struct mutex mutex;
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struct miscdevice miscdev;
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enum pci_barno test_reg_bar;
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size_t alignment;
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const char *name;
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};
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struct pci_endpoint_test_data {
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enum pci_barno test_reg_bar;
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size_t alignment;
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int irq_type;
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};
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static inline u32 pci_endpoint_test_readl(struct pci_endpoint_test *test,
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u32 offset)
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{
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return readl(test->base + offset);
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}
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static inline void pci_endpoint_test_writel(struct pci_endpoint_test *test,
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u32 offset, u32 value)
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{
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writel(value, test->base + offset);
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}
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static inline u32 pci_endpoint_test_bar_readl(struct pci_endpoint_test *test,
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int bar, int offset)
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{
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return readl(test->bar[bar] + offset);
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}
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static inline void pci_endpoint_test_bar_writel(struct pci_endpoint_test *test,
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int bar, u32 offset, u32 value)
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{
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writel(value, test->bar[bar] + offset);
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}
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static irqreturn_t pci_endpoint_test_irqhandler(int irq, void *dev_id)
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{
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struct pci_endpoint_test *test = dev_id;
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u32 reg;
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reg = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
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if (reg & STATUS_IRQ_RAISED) {
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test->last_irq = irq;
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complete(&test->irq_raised);
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reg &= ~STATUS_IRQ_RAISED;
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}
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pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_STATUS,
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reg);
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return IRQ_HANDLED;
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}
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static void pci_endpoint_test_free_irq_vectors(struct pci_endpoint_test *test)
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{
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struct pci_dev *pdev = test->pdev;
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pci_free_irq_vectors(pdev);
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test->irq_type = IRQ_TYPE_UNDEFINED;
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}
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static bool pci_endpoint_test_alloc_irq_vectors(struct pci_endpoint_test *test,
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int type)
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{
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int irq = -1;
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struct pci_dev *pdev = test->pdev;
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struct device *dev = &pdev->dev;
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bool res = true;
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switch (type) {
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case IRQ_TYPE_LEGACY:
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irq = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY);
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if (irq < 0)
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dev_err(dev, "Failed to get Legacy interrupt\n");
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break;
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case IRQ_TYPE_MSI:
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irq = pci_alloc_irq_vectors(pdev, 1, 32, PCI_IRQ_MSI);
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if (irq < 0)
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dev_err(dev, "Failed to get MSI interrupts\n");
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break;
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case IRQ_TYPE_MSIX:
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irq = pci_alloc_irq_vectors(pdev, 1, 2048, PCI_IRQ_MSIX);
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if (irq < 0)
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dev_err(dev, "Failed to get MSI-X interrupts\n");
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break;
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default:
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dev_err(dev, "Invalid IRQ type selected\n");
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}
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if (irq < 0) {
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irq = 0;
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res = false;
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}
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test->irq_type = type;
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test->num_irqs = irq;
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return res;
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}
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static void pci_endpoint_test_release_irq(struct pci_endpoint_test *test)
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{
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int i;
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struct pci_dev *pdev = test->pdev;
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struct device *dev = &pdev->dev;
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for (i = 0; i < test->num_irqs; i++)
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devm_free_irq(dev, pci_irq_vector(pdev, i), test);
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test->num_irqs = 0;
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}
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static bool pci_endpoint_test_request_irq(struct pci_endpoint_test *test)
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{
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int i;
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int err;
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struct pci_dev *pdev = test->pdev;
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struct device *dev = &pdev->dev;
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for (i = 0; i < test->num_irqs; i++) {
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err = devm_request_irq(dev, pci_irq_vector(pdev, i),
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pci_endpoint_test_irqhandler,
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IRQF_SHARED, test->name, test);
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if (err)
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goto fail;
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}
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return true;
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fail:
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switch (irq_type) {
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case IRQ_TYPE_LEGACY:
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dev_err(dev, "Failed to request IRQ %d for Legacy\n",
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pci_irq_vector(pdev, i));
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break;
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case IRQ_TYPE_MSI:
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dev_err(dev, "Failed to request IRQ %d for MSI %d\n",
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pci_irq_vector(pdev, i),
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i + 1);
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break;
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case IRQ_TYPE_MSIX:
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dev_err(dev, "Failed to request IRQ %d for MSI-X %d\n",
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pci_irq_vector(pdev, i),
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i + 1);
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break;
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}
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return false;
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}
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static bool pci_endpoint_test_bar(struct pci_endpoint_test *test,
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enum pci_barno barno)
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{
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int j;
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u32 val;
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int size;
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struct pci_dev *pdev = test->pdev;
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if (!test->bar[barno])
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return false;
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size = pci_resource_len(pdev, barno);
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if (barno == test->test_reg_bar)
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size = 0x4;
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for (j = 0; j < size; j += 4)
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pci_endpoint_test_bar_writel(test, barno, j, 0xA0A0A0A0);
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for (j = 0; j < size; j += 4) {
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val = pci_endpoint_test_bar_readl(test, barno, j);
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if (val != 0xA0A0A0A0)
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return false;
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}
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return true;
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}
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static bool pci_endpoint_test_legacy_irq(struct pci_endpoint_test *test)
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{
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u32 val;
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pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE,
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IRQ_TYPE_LEGACY);
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pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 0);
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pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
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COMMAND_RAISE_LEGACY_IRQ);
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val = wait_for_completion_timeout(&test->irq_raised,
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msecs_to_jiffies(1000));
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if (!val)
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return false;
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return true;
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}
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static bool pci_endpoint_test_msi_irq(struct pci_endpoint_test *test,
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u16 msi_num, bool msix)
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{
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u32 val;
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struct pci_dev *pdev = test->pdev;
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pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE,
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msix == false ? IRQ_TYPE_MSI :
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IRQ_TYPE_MSIX);
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pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, msi_num);
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pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
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msix == false ? COMMAND_RAISE_MSI_IRQ :
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COMMAND_RAISE_MSIX_IRQ);
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val = wait_for_completion_timeout(&test->irq_raised,
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msecs_to_jiffies(1000));
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if (!val)
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return false;
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if (pci_irq_vector(pdev, msi_num - 1) == test->last_irq)
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return true;
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return false;
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}
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static int pci_endpoint_test_validate_xfer_params(struct device *dev,
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struct pci_endpoint_test_xfer_param *param, size_t alignment)
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{
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if (!param->size) {
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dev_dbg(dev, "Data size is zero\n");
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return -EINVAL;
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}
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if (param->size > SIZE_MAX - alignment) {
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dev_dbg(dev, "Maximum transfer data size exceeded\n");
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return -EINVAL;
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}
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return 0;
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}
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static bool pci_endpoint_test_copy(struct pci_endpoint_test *test,
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unsigned long arg)
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{
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struct pci_endpoint_test_xfer_param param;
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bool ret = false;
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void *src_addr;
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void *dst_addr;
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u32 flags = 0;
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bool use_dma;
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size_t size;
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dma_addr_t src_phys_addr;
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dma_addr_t dst_phys_addr;
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struct pci_dev *pdev = test->pdev;
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struct device *dev = &pdev->dev;
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void *orig_src_addr;
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dma_addr_t orig_src_phys_addr;
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void *orig_dst_addr;
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dma_addr_t orig_dst_phys_addr;
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size_t offset;
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size_t alignment = test->alignment;
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int irq_type = test->irq_type;
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u32 src_crc32;
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u32 dst_crc32;
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int err;
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err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
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if (err) {
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dev_err(dev, "Failed to get transfer param\n");
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return false;
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}
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err = pci_endpoint_test_validate_xfer_params(dev, ¶m, alignment);
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if (err)
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return false;
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size = param.size;
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use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
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if (use_dma)
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flags |= FLAG_USE_DMA;
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if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
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dev_err(dev, "Invalid IRQ type option\n");
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goto err;
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}
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orig_src_addr = kzalloc(size + alignment, GFP_KERNEL);
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if (!orig_src_addr) {
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dev_err(dev, "Failed to allocate source buffer\n");
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ret = false;
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goto err;
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}
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get_random_bytes(orig_src_addr, size + alignment);
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orig_src_phys_addr = dma_map_single(dev, orig_src_addr,
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size + alignment, DMA_TO_DEVICE);
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if (dma_mapping_error(dev, orig_src_phys_addr)) {
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dev_err(dev, "failed to map source buffer address\n");
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ret = false;
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goto err_src_phys_addr;
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}
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if (alignment && !IS_ALIGNED(orig_src_phys_addr, alignment)) {
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src_phys_addr = PTR_ALIGN(orig_src_phys_addr, alignment);
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offset = src_phys_addr - orig_src_phys_addr;
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src_addr = orig_src_addr + offset;
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} else {
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src_phys_addr = orig_src_phys_addr;
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src_addr = orig_src_addr;
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}
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pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_SRC_ADDR,
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lower_32_bits(src_phys_addr));
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pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_SRC_ADDR,
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upper_32_bits(src_phys_addr));
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src_crc32 = crc32_le(~0, src_addr, size);
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orig_dst_addr = kzalloc(size + alignment, GFP_KERNEL);
|
|
if (!orig_dst_addr) {
|
|
dev_err(dev, "Failed to allocate destination address\n");
|
|
ret = false;
|
|
goto err_dst_addr;
|
|
}
|
|
|
|
orig_dst_phys_addr = dma_map_single(dev, orig_dst_addr,
|
|
size + alignment, DMA_FROM_DEVICE);
|
|
if (dma_mapping_error(dev, orig_dst_phys_addr)) {
|
|
dev_err(dev, "failed to map destination buffer address\n");
|
|
ret = false;
|
|
goto err_dst_phys_addr;
|
|
}
|
|
|
|
if (alignment && !IS_ALIGNED(orig_dst_phys_addr, alignment)) {
|
|
dst_phys_addr = PTR_ALIGN(orig_dst_phys_addr, alignment);
|
|
offset = dst_phys_addr - orig_dst_phys_addr;
|
|
dst_addr = orig_dst_addr + offset;
|
|
} else {
|
|
dst_phys_addr = orig_dst_phys_addr;
|
|
dst_addr = orig_dst_addr;
|
|
}
|
|
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_DST_ADDR,
|
|
lower_32_bits(dst_phys_addr));
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_DST_ADDR,
|
|
upper_32_bits(dst_phys_addr));
|
|
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE,
|
|
size);
|
|
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
|
|
COMMAND_COPY);
|
|
|
|
wait_for_completion(&test->irq_raised);
|
|
|
|
dma_unmap_single(dev, orig_dst_phys_addr, size + alignment,
|
|
DMA_FROM_DEVICE);
|
|
|
|
dst_crc32 = crc32_le(~0, dst_addr, size);
|
|
if (dst_crc32 == src_crc32)
|
|
ret = true;
|
|
|
|
err_dst_phys_addr:
|
|
kfree(orig_dst_addr);
|
|
|
|
err_dst_addr:
|
|
dma_unmap_single(dev, orig_src_phys_addr, size + alignment,
|
|
DMA_TO_DEVICE);
|
|
|
|
err_src_phys_addr:
|
|
kfree(orig_src_addr);
|
|
|
|
err:
|
|
return ret;
|
|
}
|
|
|
|
static bool pci_endpoint_test_write(struct pci_endpoint_test *test,
|
|
unsigned long arg)
|
|
{
|
|
struct pci_endpoint_test_xfer_param param;
|
|
bool ret = false;
|
|
u32 flags = 0;
|
|
bool use_dma;
|
|
u32 reg;
|
|
void *addr;
|
|
dma_addr_t phys_addr;
|
|
struct pci_dev *pdev = test->pdev;
|
|
struct device *dev = &pdev->dev;
|
|
void *orig_addr;
|
|
dma_addr_t orig_phys_addr;
|
|
size_t offset;
|
|
size_t alignment = test->alignment;
|
|
int irq_type = test->irq_type;
|
|
size_t size;
|
|
u32 crc32;
|
|
int err;
|
|
|
|
err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
|
|
if (err != 0) {
|
|
dev_err(dev, "Failed to get transfer param\n");
|
|
return false;
|
|
}
|
|
|
|
err = pci_endpoint_test_validate_xfer_params(dev, ¶m, alignment);
|
|
if (err)
|
|
return false;
|
|
|
|
size = param.size;
|
|
|
|
use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
|
|
if (use_dma)
|
|
flags |= FLAG_USE_DMA;
|
|
|
|
if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
|
|
dev_err(dev, "Invalid IRQ type option\n");
|
|
goto err;
|
|
}
|
|
|
|
orig_addr = kzalloc(size + alignment, GFP_KERNEL);
|
|
if (!orig_addr) {
|
|
dev_err(dev, "Failed to allocate address\n");
|
|
ret = false;
|
|
goto err;
|
|
}
|
|
|
|
get_random_bytes(orig_addr, size + alignment);
|
|
|
|
orig_phys_addr = dma_map_single(dev, orig_addr, size + alignment,
|
|
DMA_TO_DEVICE);
|
|
if (dma_mapping_error(dev, orig_phys_addr)) {
|
|
dev_err(dev, "failed to map source buffer address\n");
|
|
ret = false;
|
|
goto err_phys_addr;
|
|
}
|
|
|
|
if (alignment && !IS_ALIGNED(orig_phys_addr, alignment)) {
|
|
phys_addr = PTR_ALIGN(orig_phys_addr, alignment);
|
|
offset = phys_addr - orig_phys_addr;
|
|
addr = orig_addr + offset;
|
|
} else {
|
|
phys_addr = orig_phys_addr;
|
|
addr = orig_addr;
|
|
}
|
|
|
|
crc32 = crc32_le(~0, addr, size);
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_CHECKSUM,
|
|
crc32);
|
|
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_SRC_ADDR,
|
|
lower_32_bits(phys_addr));
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_SRC_ADDR,
|
|
upper_32_bits(phys_addr));
|
|
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE, size);
|
|
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
|
|
COMMAND_READ);
|
|
|
|
wait_for_completion(&test->irq_raised);
|
|
|
|
reg = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
|
|
if (reg & STATUS_READ_SUCCESS)
|
|
ret = true;
|
|
|
|
dma_unmap_single(dev, orig_phys_addr, size + alignment,
|
|
DMA_TO_DEVICE);
|
|
|
|
err_phys_addr:
|
|
kfree(orig_addr);
|
|
|
|
err:
|
|
return ret;
|
|
}
|
|
|
|
static bool pci_endpoint_test_read(struct pci_endpoint_test *test,
|
|
unsigned long arg)
|
|
{
|
|
struct pci_endpoint_test_xfer_param param;
|
|
bool ret = false;
|
|
u32 flags = 0;
|
|
bool use_dma;
|
|
size_t size;
|
|
void *addr;
|
|
dma_addr_t phys_addr;
|
|
struct pci_dev *pdev = test->pdev;
|
|
struct device *dev = &pdev->dev;
|
|
void *orig_addr;
|
|
dma_addr_t orig_phys_addr;
|
|
size_t offset;
|
|
size_t alignment = test->alignment;
|
|
int irq_type = test->irq_type;
|
|
u32 crc32;
|
|
int err;
|
|
|
|
err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
|
|
if (err) {
|
|
dev_err(dev, "Failed to get transfer param\n");
|
|
return false;
|
|
}
|
|
|
|
err = pci_endpoint_test_validate_xfer_params(dev, ¶m, alignment);
|
|
if (err)
|
|
return false;
|
|
|
|
size = param.size;
|
|
|
|
use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
|
|
if (use_dma)
|
|
flags |= FLAG_USE_DMA;
|
|
|
|
if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
|
|
dev_err(dev, "Invalid IRQ type option\n");
|
|
goto err;
|
|
}
|
|
|
|
orig_addr = kzalloc(size + alignment, GFP_KERNEL);
|
|
if (!orig_addr) {
|
|
dev_err(dev, "Failed to allocate destination address\n");
|
|
ret = false;
|
|
goto err;
|
|
}
|
|
|
|
orig_phys_addr = dma_map_single(dev, orig_addr, size + alignment,
|
|
DMA_FROM_DEVICE);
|
|
if (dma_mapping_error(dev, orig_phys_addr)) {
|
|
dev_err(dev, "failed to map source buffer address\n");
|
|
ret = false;
|
|
goto err_phys_addr;
|
|
}
|
|
|
|
if (alignment && !IS_ALIGNED(orig_phys_addr, alignment)) {
|
|
phys_addr = PTR_ALIGN(orig_phys_addr, alignment);
|
|
offset = phys_addr - orig_phys_addr;
|
|
addr = orig_addr + offset;
|
|
} else {
|
|
phys_addr = orig_phys_addr;
|
|
addr = orig_addr;
|
|
}
|
|
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_DST_ADDR,
|
|
lower_32_bits(phys_addr));
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_DST_ADDR,
|
|
upper_32_bits(phys_addr));
|
|
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE, size);
|
|
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
|
|
pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
|
|
COMMAND_WRITE);
|
|
|
|
wait_for_completion(&test->irq_raised);
|
|
|
|
dma_unmap_single(dev, orig_phys_addr, size + alignment,
|
|
DMA_FROM_DEVICE);
|
|
|
|
crc32 = crc32_le(~0, addr, size);
|
|
if (crc32 == pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_CHECKSUM))
|
|
ret = true;
|
|
|
|
err_phys_addr:
|
|
kfree(orig_addr);
|
|
err:
|
|
return ret;
|
|
}
|
|
|
|
static bool pci_endpoint_test_clear_irq(struct pci_endpoint_test *test)
|
|
{
|
|
pci_endpoint_test_release_irq(test);
|
|
pci_endpoint_test_free_irq_vectors(test);
|
|
return true;
|
|
}
|
|
|
|
static bool pci_endpoint_test_set_irq(struct pci_endpoint_test *test,
|
|
int req_irq_type)
|
|
{
|
|
struct pci_dev *pdev = test->pdev;
|
|
struct device *dev = &pdev->dev;
|
|
|
|
if (req_irq_type < IRQ_TYPE_LEGACY || req_irq_type > IRQ_TYPE_MSIX) {
|
|
dev_err(dev, "Invalid IRQ type option\n");
|
|
return false;
|
|
}
|
|
|
|
if (test->irq_type == req_irq_type)
|
|
return true;
|
|
|
|
pci_endpoint_test_release_irq(test);
|
|
pci_endpoint_test_free_irq_vectors(test);
|
|
|
|
if (!pci_endpoint_test_alloc_irq_vectors(test, req_irq_type))
|
|
goto err;
|
|
|
|
if (!pci_endpoint_test_request_irq(test))
|
|
goto err;
|
|
|
|
return true;
|
|
|
|
err:
|
|
pci_endpoint_test_free_irq_vectors(test);
|
|
return false;
|
|
}
|
|
|
|
static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
|
|
unsigned long arg)
|
|
{
|
|
int ret = -EINVAL;
|
|
enum pci_barno bar;
|
|
struct pci_endpoint_test *test = to_endpoint_test(file->private_data);
|
|
struct pci_dev *pdev = test->pdev;
|
|
|
|
mutex_lock(&test->mutex);
|
|
switch (cmd) {
|
|
case PCITEST_BAR:
|
|
bar = arg;
|
|
if (bar > BAR_5)
|
|
goto ret;
|
|
if (is_am654_pci_dev(pdev) && bar == BAR_0)
|
|
goto ret;
|
|
ret = pci_endpoint_test_bar(test, bar);
|
|
break;
|
|
case PCITEST_LEGACY_IRQ:
|
|
ret = pci_endpoint_test_legacy_irq(test);
|
|
break;
|
|
case PCITEST_MSI:
|
|
case PCITEST_MSIX:
|
|
ret = pci_endpoint_test_msi_irq(test, arg, cmd == PCITEST_MSIX);
|
|
break;
|
|
case PCITEST_WRITE:
|
|
ret = pci_endpoint_test_write(test, arg);
|
|
break;
|
|
case PCITEST_READ:
|
|
ret = pci_endpoint_test_read(test, arg);
|
|
break;
|
|
case PCITEST_COPY:
|
|
ret = pci_endpoint_test_copy(test, arg);
|
|
break;
|
|
case PCITEST_SET_IRQTYPE:
|
|
ret = pci_endpoint_test_set_irq(test, arg);
|
|
break;
|
|
case PCITEST_GET_IRQTYPE:
|
|
ret = irq_type;
|
|
break;
|
|
case PCITEST_CLEAR_IRQ:
|
|
ret = pci_endpoint_test_clear_irq(test);
|
|
break;
|
|
}
|
|
|
|
ret:
|
|
mutex_unlock(&test->mutex);
|
|
return ret;
|
|
}
|
|
|
|
static const struct file_operations pci_endpoint_test_fops = {
|
|
.owner = THIS_MODULE,
|
|
.unlocked_ioctl = pci_endpoint_test_ioctl,
|
|
};
|
|
|
|
static int pci_endpoint_test_probe(struct pci_dev *pdev,
|
|
const struct pci_device_id *ent)
|
|
{
|
|
int err;
|
|
int id;
|
|
char name[24];
|
|
enum pci_barno bar;
|
|
void __iomem *base;
|
|
struct device *dev = &pdev->dev;
|
|
struct pci_endpoint_test *test;
|
|
struct pci_endpoint_test_data *data;
|
|
enum pci_barno test_reg_bar = BAR_0;
|
|
struct miscdevice *misc_device;
|
|
|
|
if (pci_is_bridge(pdev))
|
|
return -ENODEV;
|
|
|
|
test = devm_kzalloc(dev, sizeof(*test), GFP_KERNEL);
|
|
if (!test)
|
|
return -ENOMEM;
|
|
|
|
test->test_reg_bar = 0;
|
|
test->alignment = 0;
|
|
test->pdev = pdev;
|
|
test->irq_type = IRQ_TYPE_UNDEFINED;
|
|
|
|
if (no_msi)
|
|
irq_type = IRQ_TYPE_LEGACY;
|
|
|
|
data = (struct pci_endpoint_test_data *)ent->driver_data;
|
|
if (data) {
|
|
test_reg_bar = data->test_reg_bar;
|
|
test->test_reg_bar = test_reg_bar;
|
|
test->alignment = data->alignment;
|
|
irq_type = data->irq_type;
|
|
}
|
|
|
|
init_completion(&test->irq_raised);
|
|
mutex_init(&test->mutex);
|
|
|
|
if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)) != 0) &&
|
|
dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)) != 0) {
|
|
dev_err(dev, "Cannot set DMA mask\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
err = pci_enable_device(pdev);
|
|
if (err) {
|
|
dev_err(dev, "Cannot enable PCI device\n");
|
|
return err;
|
|
}
|
|
|
|
err = pci_request_regions(pdev, DRV_MODULE_NAME);
|
|
if (err) {
|
|
dev_err(dev, "Cannot obtain PCI resources\n");
|
|
goto err_disable_pdev;
|
|
}
|
|
|
|
pci_set_master(pdev);
|
|
|
|
if (!pci_endpoint_test_alloc_irq_vectors(test, irq_type)) {
|
|
err = -EINVAL;
|
|
goto err_disable_irq;
|
|
}
|
|
|
|
for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
|
|
if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) {
|
|
base = pci_ioremap_bar(pdev, bar);
|
|
if (!base) {
|
|
dev_err(dev, "Failed to read BAR%d\n", bar);
|
|
WARN_ON(bar == test_reg_bar);
|
|
}
|
|
test->bar[bar] = base;
|
|
}
|
|
}
|
|
|
|
test->base = test->bar[test_reg_bar];
|
|
if (!test->base) {
|
|
err = -ENOMEM;
|
|
dev_err(dev, "Cannot perform PCI test without BAR%d\n",
|
|
test_reg_bar);
|
|
goto err_iounmap;
|
|
}
|
|
|
|
pci_set_drvdata(pdev, test);
|
|
|
|
id = ida_simple_get(&pci_endpoint_test_ida, 0, 0, GFP_KERNEL);
|
|
if (id < 0) {
|
|
err = id;
|
|
dev_err(dev, "Unable to get id\n");
|
|
goto err_iounmap;
|
|
}
|
|
|
|
snprintf(name, sizeof(name), DRV_MODULE_NAME ".%d", id);
|
|
test->name = kstrdup(name, GFP_KERNEL);
|
|
if (!test->name) {
|
|
err = -ENOMEM;
|
|
goto err_ida_remove;
|
|
}
|
|
|
|
if (!pci_endpoint_test_request_irq(test)) {
|
|
err = -EINVAL;
|
|
goto err_kfree_test_name;
|
|
}
|
|
|
|
misc_device = &test->miscdev;
|
|
misc_device->minor = MISC_DYNAMIC_MINOR;
|
|
misc_device->name = kstrdup(name, GFP_KERNEL);
|
|
if (!misc_device->name) {
|
|
err = -ENOMEM;
|
|
goto err_release_irq;
|
|
}
|
|
misc_device->parent = &pdev->dev;
|
|
misc_device->fops = &pci_endpoint_test_fops;
|
|
|
|
err = misc_register(misc_device);
|
|
if (err) {
|
|
dev_err(dev, "Failed to register device\n");
|
|
goto err_kfree_name;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_kfree_name:
|
|
kfree(misc_device->name);
|
|
|
|
err_release_irq:
|
|
pci_endpoint_test_release_irq(test);
|
|
|
|
err_kfree_test_name:
|
|
kfree(test->name);
|
|
|
|
err_ida_remove:
|
|
ida_simple_remove(&pci_endpoint_test_ida, id);
|
|
|
|
err_iounmap:
|
|
for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
|
|
if (test->bar[bar])
|
|
pci_iounmap(pdev, test->bar[bar]);
|
|
}
|
|
|
|
err_disable_irq:
|
|
pci_endpoint_test_free_irq_vectors(test);
|
|
pci_release_regions(pdev);
|
|
|
|
err_disable_pdev:
|
|
pci_disable_device(pdev);
|
|
|
|
return err;
|
|
}
|
|
|
|
static void pci_endpoint_test_remove(struct pci_dev *pdev)
|
|
{
|
|
int id;
|
|
enum pci_barno bar;
|
|
struct pci_endpoint_test *test = pci_get_drvdata(pdev);
|
|
struct miscdevice *misc_device = &test->miscdev;
|
|
|
|
if (sscanf(misc_device->name, DRV_MODULE_NAME ".%d", &id) != 1)
|
|
return;
|
|
if (id < 0)
|
|
return;
|
|
|
|
misc_deregister(&test->miscdev);
|
|
kfree(misc_device->name);
|
|
kfree(test->name);
|
|
ida_simple_remove(&pci_endpoint_test_ida, id);
|
|
for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
|
|
if (test->bar[bar])
|
|
pci_iounmap(pdev, test->bar[bar]);
|
|
}
|
|
|
|
pci_endpoint_test_release_irq(test);
|
|
pci_endpoint_test_free_irq_vectors(test);
|
|
|
|
pci_release_regions(pdev);
|
|
pci_disable_device(pdev);
|
|
}
|
|
|
|
static const struct pci_endpoint_test_data default_data = {
|
|
.test_reg_bar = BAR_0,
|
|
.alignment = SZ_4K,
|
|
.irq_type = IRQ_TYPE_MSI,
|
|
};
|
|
|
|
static const struct pci_endpoint_test_data am654_data = {
|
|
.test_reg_bar = BAR_2,
|
|
.alignment = SZ_64K,
|
|
.irq_type = IRQ_TYPE_MSI,
|
|
};
|
|
|
|
static const struct pci_endpoint_test_data j721e_data = {
|
|
.alignment = 256,
|
|
.irq_type = IRQ_TYPE_MSI,
|
|
};
|
|
|
|
static const struct pci_device_id pci_endpoint_test_tbl[] = {
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA74x),
|
|
.driver_data = (kernel_ulong_t)&default_data,
|
|
},
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA72x),
|
|
.driver_data = (kernel_ulong_t)&default_data,
|
|
},
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0),
|
|
.driver_data = (kernel_ulong_t)&default_data,
|
|
},
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_LS1088A),
|
|
.driver_data = (kernel_ulong_t)&default_data,
|
|
},
|
|
{ PCI_DEVICE_DATA(SYNOPSYS, EDDA, NULL) },
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_AM654),
|
|
.driver_data = (kernel_ulong_t)&am654_data
|
|
},
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774A1),},
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774B1),},
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774C0),},
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774E1),},
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_J721E),
|
|
.driver_data = (kernel_ulong_t)&j721e_data,
|
|
},
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_J7200),
|
|
.driver_data = (kernel_ulong_t)&j721e_data,
|
|
},
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_AM64),
|
|
.driver_data = (kernel_ulong_t)&j721e_data,
|
|
},
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(pci, pci_endpoint_test_tbl);
|
|
|
|
static struct pci_driver pci_endpoint_test_driver = {
|
|
.name = DRV_MODULE_NAME,
|
|
.id_table = pci_endpoint_test_tbl,
|
|
.probe = pci_endpoint_test_probe,
|
|
.remove = pci_endpoint_test_remove,
|
|
.sriov_configure = pci_sriov_configure_simple,
|
|
};
|
|
module_pci_driver(pci_endpoint_test_driver);
|
|
|
|
MODULE_DESCRIPTION("PCI ENDPOINT TEST HOST DRIVER");
|
|
MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>");
|
|
MODULE_LICENSE("GPL v2");
|