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d91cab7813
There are two concepts that have some confusing naming: 1. Extended State Component numbers (currently called XFEATURE_BIT_*) 2. Extended State Component masks (currently called XSTATE_*) The numbers are (currently) from 0-9. State component 3 is the bounds registers for MPX, for instance. But when we want to enable "state component 3", we go set a bit in XCR0. The bit we set is 1<<3. We can check to see if a state component feature is enabled by looking at its bit. The current 'xfeature_bit's are at best xfeature bit _numbers_. Calling them bits is at best inconsistent with ending the enum list with 'XFEATURES_NR_MAX'. This patch renames the enum to be 'xfeature'. These also happen to be what the Intel documentation calls a "state component". We also want to differentiate these from the "XSTATE_*" macros. The "XSTATE_*" macros are a mask, and we rename them to match. These macros are reasonably widely used so this patch is a wee bit big, but this really is just a rename. The only non-mechanical part of this is the s/XSTATE_EXTEND_MASK/XFEATURE_MASK_EXTEND/ We need a better name for it, but that's another patch. Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tim Chen <tim.c.chen@linux.intel.com> Cc: dave@sr71.net Cc: linux-kernel@vger.kernel.org Link: http://lkml.kernel.org/r/20150902233126.38653250@viggo.jf.intel.com [ Ported to v4.3-rc1. ] Signed-off-by: Ingo Molnar <mingo@kernel.org>
492 lines
12 KiB
C
492 lines
12 KiB
C
/*
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* Glue Code for the AVX assembler implemention of the Cast5 Cipher
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*
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* Copyright (C) 2012 Johannes Goetzfried
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* <Johannes.Goetzfried@informatik.stud.uni-erlangen.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
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* USA
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*
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*/
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#include <linux/module.h>
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#include <linux/hardirq.h>
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#include <linux/types.h>
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#include <linux/crypto.h>
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#include <linux/err.h>
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#include <crypto/ablk_helper.h>
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#include <crypto/algapi.h>
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#include <crypto/cast5.h>
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#include <crypto/cryptd.h>
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#include <crypto/ctr.h>
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#include <asm/fpu/api.h>
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#include <asm/crypto/glue_helper.h>
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#define CAST5_PARALLEL_BLOCKS 16
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asmlinkage void cast5_ecb_enc_16way(struct cast5_ctx *ctx, u8 *dst,
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const u8 *src);
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asmlinkage void cast5_ecb_dec_16way(struct cast5_ctx *ctx, u8 *dst,
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const u8 *src);
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asmlinkage void cast5_cbc_dec_16way(struct cast5_ctx *ctx, u8 *dst,
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const u8 *src);
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asmlinkage void cast5_ctr_16way(struct cast5_ctx *ctx, u8 *dst, const u8 *src,
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__be64 *iv);
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static inline bool cast5_fpu_begin(bool fpu_enabled, unsigned int nbytes)
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{
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return glue_fpu_begin(CAST5_BLOCK_SIZE, CAST5_PARALLEL_BLOCKS,
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NULL, fpu_enabled, nbytes);
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}
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static inline void cast5_fpu_end(bool fpu_enabled)
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{
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return glue_fpu_end(fpu_enabled);
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}
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static int ecb_crypt(struct blkcipher_desc *desc, struct blkcipher_walk *walk,
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bool enc)
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{
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bool fpu_enabled = false;
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struct cast5_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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const unsigned int bsize = CAST5_BLOCK_SIZE;
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unsigned int nbytes;
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void (*fn)(struct cast5_ctx *ctx, u8 *dst, const u8 *src);
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int err;
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fn = (enc) ? cast5_ecb_enc_16way : cast5_ecb_dec_16way;
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err = blkcipher_walk_virt(desc, walk);
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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while ((nbytes = walk->nbytes)) {
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u8 *wsrc = walk->src.virt.addr;
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u8 *wdst = walk->dst.virt.addr;
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fpu_enabled = cast5_fpu_begin(fpu_enabled, nbytes);
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/* Process multi-block batch */
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if (nbytes >= bsize * CAST5_PARALLEL_BLOCKS) {
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do {
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fn(ctx, wdst, wsrc);
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wsrc += bsize * CAST5_PARALLEL_BLOCKS;
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wdst += bsize * CAST5_PARALLEL_BLOCKS;
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nbytes -= bsize * CAST5_PARALLEL_BLOCKS;
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} while (nbytes >= bsize * CAST5_PARALLEL_BLOCKS);
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if (nbytes < bsize)
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goto done;
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}
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fn = (enc) ? __cast5_encrypt : __cast5_decrypt;
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/* Handle leftovers */
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do {
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fn(ctx, wdst, wsrc);
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wsrc += bsize;
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wdst += bsize;
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nbytes -= bsize;
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} while (nbytes >= bsize);
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done:
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err = blkcipher_walk_done(desc, walk, nbytes);
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}
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cast5_fpu_end(fpu_enabled);
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return err;
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}
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static int ecb_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct blkcipher_walk walk;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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return ecb_crypt(desc, &walk, true);
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}
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static int ecb_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct blkcipher_walk walk;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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return ecb_crypt(desc, &walk, false);
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}
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static unsigned int __cbc_encrypt(struct blkcipher_desc *desc,
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struct blkcipher_walk *walk)
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{
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struct cast5_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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const unsigned int bsize = CAST5_BLOCK_SIZE;
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unsigned int nbytes = walk->nbytes;
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u64 *src = (u64 *)walk->src.virt.addr;
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u64 *dst = (u64 *)walk->dst.virt.addr;
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u64 *iv = (u64 *)walk->iv;
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do {
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*dst = *src ^ *iv;
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__cast5_encrypt(ctx, (u8 *)dst, (u8 *)dst);
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iv = dst;
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src += 1;
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dst += 1;
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nbytes -= bsize;
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} while (nbytes >= bsize);
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*(u64 *)walk->iv = *iv;
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return nbytes;
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}
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static int cbc_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct blkcipher_walk walk;
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int err;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt(desc, &walk);
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while ((nbytes = walk.nbytes)) {
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nbytes = __cbc_encrypt(desc, &walk);
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err = blkcipher_walk_done(desc, &walk, nbytes);
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}
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return err;
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}
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static unsigned int __cbc_decrypt(struct blkcipher_desc *desc,
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struct blkcipher_walk *walk)
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{
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struct cast5_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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const unsigned int bsize = CAST5_BLOCK_SIZE;
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unsigned int nbytes = walk->nbytes;
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u64 *src = (u64 *)walk->src.virt.addr;
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u64 *dst = (u64 *)walk->dst.virt.addr;
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u64 last_iv;
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/* Start of the last block. */
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src += nbytes / bsize - 1;
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dst += nbytes / bsize - 1;
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last_iv = *src;
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/* Process multi-block batch */
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if (nbytes >= bsize * CAST5_PARALLEL_BLOCKS) {
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do {
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nbytes -= bsize * (CAST5_PARALLEL_BLOCKS - 1);
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src -= CAST5_PARALLEL_BLOCKS - 1;
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dst -= CAST5_PARALLEL_BLOCKS - 1;
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cast5_cbc_dec_16way(ctx, (u8 *)dst, (u8 *)src);
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nbytes -= bsize;
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if (nbytes < bsize)
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goto done;
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*dst ^= *(src - 1);
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src -= 1;
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dst -= 1;
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} while (nbytes >= bsize * CAST5_PARALLEL_BLOCKS);
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}
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/* Handle leftovers */
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for (;;) {
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__cast5_decrypt(ctx, (u8 *)dst, (u8 *)src);
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nbytes -= bsize;
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if (nbytes < bsize)
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break;
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*dst ^= *(src - 1);
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src -= 1;
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dst -= 1;
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}
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done:
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*dst ^= *(u64 *)walk->iv;
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*(u64 *)walk->iv = last_iv;
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return nbytes;
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}
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static int cbc_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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bool fpu_enabled = false;
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struct blkcipher_walk walk;
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int err;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt(desc, &walk);
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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while ((nbytes = walk.nbytes)) {
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fpu_enabled = cast5_fpu_begin(fpu_enabled, nbytes);
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nbytes = __cbc_decrypt(desc, &walk);
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err = blkcipher_walk_done(desc, &walk, nbytes);
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}
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cast5_fpu_end(fpu_enabled);
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return err;
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}
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static void ctr_crypt_final(struct blkcipher_desc *desc,
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struct blkcipher_walk *walk)
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{
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struct cast5_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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u8 *ctrblk = walk->iv;
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u8 keystream[CAST5_BLOCK_SIZE];
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u8 *src = walk->src.virt.addr;
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u8 *dst = walk->dst.virt.addr;
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unsigned int nbytes = walk->nbytes;
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__cast5_encrypt(ctx, keystream, ctrblk);
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crypto_xor(keystream, src, nbytes);
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memcpy(dst, keystream, nbytes);
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crypto_inc(ctrblk, CAST5_BLOCK_SIZE);
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}
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static unsigned int __ctr_crypt(struct blkcipher_desc *desc,
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struct blkcipher_walk *walk)
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{
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struct cast5_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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const unsigned int bsize = CAST5_BLOCK_SIZE;
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unsigned int nbytes = walk->nbytes;
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u64 *src = (u64 *)walk->src.virt.addr;
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u64 *dst = (u64 *)walk->dst.virt.addr;
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/* Process multi-block batch */
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if (nbytes >= bsize * CAST5_PARALLEL_BLOCKS) {
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do {
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cast5_ctr_16way(ctx, (u8 *)dst, (u8 *)src,
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(__be64 *)walk->iv);
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src += CAST5_PARALLEL_BLOCKS;
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dst += CAST5_PARALLEL_BLOCKS;
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nbytes -= bsize * CAST5_PARALLEL_BLOCKS;
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} while (nbytes >= bsize * CAST5_PARALLEL_BLOCKS);
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if (nbytes < bsize)
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goto done;
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}
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/* Handle leftovers */
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do {
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u64 ctrblk;
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if (dst != src)
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*dst = *src;
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ctrblk = *(u64 *)walk->iv;
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be64_add_cpu((__be64 *)walk->iv, 1);
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__cast5_encrypt(ctx, (u8 *)&ctrblk, (u8 *)&ctrblk);
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*dst ^= ctrblk;
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src += 1;
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dst += 1;
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nbytes -= bsize;
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} while (nbytes >= bsize);
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done:
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return nbytes;
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}
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static int ctr_crypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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bool fpu_enabled = false;
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struct blkcipher_walk walk;
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int err;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt_block(desc, &walk, CAST5_BLOCK_SIZE);
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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while ((nbytes = walk.nbytes) >= CAST5_BLOCK_SIZE) {
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fpu_enabled = cast5_fpu_begin(fpu_enabled, nbytes);
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nbytes = __ctr_crypt(desc, &walk);
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err = blkcipher_walk_done(desc, &walk, nbytes);
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}
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cast5_fpu_end(fpu_enabled);
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if (walk.nbytes) {
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ctr_crypt_final(desc, &walk);
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err = blkcipher_walk_done(desc, &walk, 0);
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}
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return err;
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}
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static struct crypto_alg cast5_algs[6] = { {
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.cra_name = "__ecb-cast5-avx",
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.cra_driver_name = "__driver-ecb-cast5-avx",
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.cra_priority = 0,
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.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER |
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CRYPTO_ALG_INTERNAL,
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.cra_blocksize = CAST5_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct cast5_ctx),
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.cra_alignmask = 0,
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.cra_type = &crypto_blkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_u = {
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.blkcipher = {
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.min_keysize = CAST5_MIN_KEY_SIZE,
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.max_keysize = CAST5_MAX_KEY_SIZE,
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.setkey = cast5_setkey,
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.encrypt = ecb_encrypt,
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.decrypt = ecb_decrypt,
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},
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},
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}, {
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.cra_name = "__cbc-cast5-avx",
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.cra_driver_name = "__driver-cbc-cast5-avx",
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.cra_priority = 0,
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.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER |
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CRYPTO_ALG_INTERNAL,
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.cra_blocksize = CAST5_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct cast5_ctx),
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.cra_alignmask = 0,
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.cra_type = &crypto_blkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_u = {
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.blkcipher = {
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.min_keysize = CAST5_MIN_KEY_SIZE,
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.max_keysize = CAST5_MAX_KEY_SIZE,
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.setkey = cast5_setkey,
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.encrypt = cbc_encrypt,
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.decrypt = cbc_decrypt,
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},
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},
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}, {
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.cra_name = "__ctr-cast5-avx",
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.cra_driver_name = "__driver-ctr-cast5-avx",
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.cra_priority = 0,
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.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER |
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CRYPTO_ALG_INTERNAL,
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.cra_blocksize = 1,
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.cra_ctxsize = sizeof(struct cast5_ctx),
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.cra_alignmask = 0,
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.cra_type = &crypto_blkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_u = {
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.blkcipher = {
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.min_keysize = CAST5_MIN_KEY_SIZE,
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.max_keysize = CAST5_MAX_KEY_SIZE,
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.ivsize = CAST5_BLOCK_SIZE,
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.setkey = cast5_setkey,
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.encrypt = ctr_crypt,
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.decrypt = ctr_crypt,
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},
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},
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}, {
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.cra_name = "ecb(cast5)",
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.cra_driver_name = "ecb-cast5-avx",
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.cra_priority = 200,
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.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
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.cra_blocksize = CAST5_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct async_helper_ctx),
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.cra_alignmask = 0,
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.cra_type = &crypto_ablkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_init = ablk_init,
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.cra_exit = ablk_exit,
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.cra_u = {
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.ablkcipher = {
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.min_keysize = CAST5_MIN_KEY_SIZE,
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.max_keysize = CAST5_MAX_KEY_SIZE,
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.setkey = ablk_set_key,
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.encrypt = ablk_encrypt,
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.decrypt = ablk_decrypt,
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},
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},
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}, {
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.cra_name = "cbc(cast5)",
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.cra_driver_name = "cbc-cast5-avx",
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.cra_priority = 200,
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.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
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.cra_blocksize = CAST5_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct async_helper_ctx),
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.cra_alignmask = 0,
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.cra_type = &crypto_ablkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_init = ablk_init,
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.cra_exit = ablk_exit,
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.cra_u = {
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.ablkcipher = {
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.min_keysize = CAST5_MIN_KEY_SIZE,
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.max_keysize = CAST5_MAX_KEY_SIZE,
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.ivsize = CAST5_BLOCK_SIZE,
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.setkey = ablk_set_key,
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.encrypt = __ablk_encrypt,
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.decrypt = ablk_decrypt,
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},
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},
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}, {
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.cra_name = "ctr(cast5)",
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.cra_driver_name = "ctr-cast5-avx",
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.cra_priority = 200,
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.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
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.cra_blocksize = 1,
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.cra_ctxsize = sizeof(struct async_helper_ctx),
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.cra_alignmask = 0,
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.cra_type = &crypto_ablkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_init = ablk_init,
|
|
.cra_exit = ablk_exit,
|
|
.cra_u = {
|
|
.ablkcipher = {
|
|
.min_keysize = CAST5_MIN_KEY_SIZE,
|
|
.max_keysize = CAST5_MAX_KEY_SIZE,
|
|
.ivsize = CAST5_BLOCK_SIZE,
|
|
.setkey = ablk_set_key,
|
|
.encrypt = ablk_encrypt,
|
|
.decrypt = ablk_encrypt,
|
|
.geniv = "chainiv",
|
|
},
|
|
},
|
|
} };
|
|
|
|
static int __init cast5_init(void)
|
|
{
|
|
const char *feature_name;
|
|
|
|
if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM,
|
|
&feature_name)) {
|
|
pr_info("CPU feature '%s' is not supported.\n", feature_name);
|
|
return -ENODEV;
|
|
}
|
|
|
|
return crypto_register_algs(cast5_algs, ARRAY_SIZE(cast5_algs));
|
|
}
|
|
|
|
static void __exit cast5_exit(void)
|
|
{
|
|
crypto_unregister_algs(cast5_algs, ARRAY_SIZE(cast5_algs));
|
|
}
|
|
|
|
module_init(cast5_init);
|
|
module_exit(cast5_exit);
|
|
|
|
MODULE_DESCRIPTION("Cast5 Cipher Algorithm, AVX optimized");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS_CRYPTO("cast5");
|