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There are two per CPU data needs to be stored and cached to avoid repeated MSR readings for accessing them later: - Physical to logical CPU conversion The PUNIT uses a different CPU numbering scheme which is not APIC id based. So we need to establish relationship between PUNIT CPU number and Linux logical CPU numbering which is based on APIC id. There is an MSR 0x53 (MSR_THREAD_ID), which gets physical CPU number for the local CPU where it is read. Also the CPU mask in some messages will inform which CPUs needs to be online/offline for a TDP level. During TDP switch if user offlined some CPUs, then the physical CPU mask can't be converted as we can't read MSR on an offlined CPU to go to a lower TDP level by onlining more CPUs. So the mapping needs to be established at the boot up time. - Bus number corresponding to a CPU A group of CPUs are in a control of a PUNIT. The PUNIT device is exported as PCI device. To do operation on a PUNIT for a CPU, we need to find out to which PCI device it is related to. This is done by reading MSR 0x128 (MSR_CPU_BUS_NUMBER). So during CPU online stages the above MSRs are read and stored. Later this stored information is used to process IOCTLs request from the user space. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
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