linux/arch/x86/events/probe.h
Zhang Rui ffb20c2e52 perf/x86/rapl: Add msr mask support
In some cases, when probing a perf MSR, we're probing certain bits of the
MSR instead of the whole register, thus only these bits should be checked.

For example, for RAPL ENERGY_STATUS MSR, only the lower 32 bits represents
the energy counter, and the higher 32bits are reserved.

Introduce a new mask field in struct perf_msr to allow probing certain
bits of a MSR.

This change is transparent to the current perf_msr_probe() users.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lkml.kernel.org/r/20210204161816.12649-1-rui.zhang@intel.com
2021-02-10 14:44:54 +01:00

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C

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ARCH_X86_EVENTS_PROBE_H__
#define __ARCH_X86_EVENTS_PROBE_H__
#include <linux/sysfs.h>
struct perf_msr {
u64 msr;
struct attribute_group *grp;
bool (*test)(int idx, void *data);
bool no_check;
u64 mask;
};
unsigned long
perf_msr_probe(struct perf_msr *msr, int cnt, bool no_zero, void *data);
#define __PMU_EVENT_GROUP(_name) \
static struct attribute *attrs_##_name[] = { \
&attr_##_name.attr.attr, \
NULL, \
}
#define PMU_EVENT_GROUP(_grp, _name) \
__PMU_EVENT_GROUP(_name); \
static struct attribute_group group_##_name = { \
.name = #_grp, \
.attrs = attrs_##_name, \
}
#endif /* __ARCH_X86_EVENTS_PROBE_H__ */