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c7e79b2b2d
RT274 is a HD-A/SOC dual mode codec. This is the initial codec driver of SOC mode. Signed-off-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
218 lines
7.2 KiB
C
218 lines
7.2 KiB
C
/*
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* rt274.h -- RT274 ALSA SoC audio driver
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*
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* Copyright 2016 Realtek Microelectronics
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* Author: Bard Liao <bardliao@realtek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __RT274_H__
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#define __RT274_H__
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#define VERB_CMD(V, N, D) ((N << 20) | (V << 8) | D)
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#define RT274_AUDIO_FUNCTION_GROUP 0x01
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#define RT274_DAC_OUT0 0x02
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#define RT274_DAC_OUT1 0x03
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#define RT274_ADC_IN2 0x08
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#define RT274_ADC_IN1 0x09
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#define RT274_DIG_CVT 0x0a
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#define RT274_DMIC1 0x12
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#define RT274_DMIC2 0x13
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#define RT274_MIC 0x19
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#define RT274_LINE1 0x1a
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#define RT274_LINE2 0x1b
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#define RT274_LINE3 0x16
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#define RT274_SPDIF 0x1e
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#define RT274_VENDOR_REGISTERS 0x20
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#define RT274_HP_OUT 0x21
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#define RT274_MIXER_IN1 0x22
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#define RT274_MIXER_IN2 0x23
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#define RT274_INLINE_CMD 0x55
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#define RT274_SET_PIN_SFT 6
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#define RT274_SET_PIN_ENABLE 0x40
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#define RT274_SET_PIN_DISABLE 0
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#define RT274_SET_EAPD_HIGH 0x2
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#define RT274_SET_EAPD_LOW 0
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#define RT274_MUTE_SFT 7
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/* Verb commands */
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#define RT274_RESET\
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VERB_CMD(AC_VERB_SET_CODEC_RESET, RT274_AUDIO_FUNCTION_GROUP, 0)
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#define RT274_GET_PARAM(NID, PARAM) VERB_CMD(AC_VERB_PARAMETERS, NID, PARAM)
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#define RT274_SET_POWER(NID) VERB_CMD(AC_VERB_SET_POWER_STATE, NID, 0)
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#define RT274_SET_AUDIO_POWER RT274_SET_POWER(RT274_AUDIO_FUNCTION_GROUP)
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#define RT274_SET_HPO_POWER RT274_SET_POWER(RT274_HP_OUT)
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#define RT274_SET_DMIC1_POWER RT274_SET_POWER(RT274_DMIC1)
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#define RT274_LOUT_MUX\
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VERB_CMD(AC_VERB_SET_CONNECT_SEL, RT274_LINE3, 0)
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#define RT274_HPO_MUX\
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VERB_CMD(AC_VERB_SET_CONNECT_SEL, RT274_HP_OUT, 0)
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#define RT274_ADC0_MUX\
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VERB_CMD(AC_VERB_SET_CONNECT_SEL, RT274_MIXER_IN1, 0)
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#define RT274_ADC1_MUX\
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VERB_CMD(AC_VERB_SET_CONNECT_SEL, RT274_MIXER_IN2, 0)
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#define RT274_SET_MIC\
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VERB_CMD(AC_VERB_SET_PIN_WIDGET_CONTROL, RT274_MIC, 0)
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#define RT274_SET_PIN_LOUT3\
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VERB_CMD(AC_VERB_SET_PIN_WIDGET_CONTROL, RT274_LINE3, 0)
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#define RT274_SET_PIN_HPO\
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VERB_CMD(AC_VERB_SET_PIN_WIDGET_CONTROL, RT274_HP_OUT, 0)
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#define RT274_SET_PIN_DMIC1\
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VERB_CMD(AC_VERB_SET_PIN_WIDGET_CONTROL, RT274_DMIC1, 0)
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#define RT274_SET_PIN_SPDIF\
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VERB_CMD(AC_VERB_SET_PIN_WIDGET_CONTROL, RT274_SPDIF, 0)
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#define RT274_SET_PIN_DIG_CVT\
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VERB_CMD(AC_VERB_SET_DIGI_CONVERT_1, RT274_DIG_CVT, 0)
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#define RT274_SET_AMP_GAIN_HPO\
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VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_HP_OUT, 0)
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#define RT274_SET_AMP_GAIN_ADC_IN1\
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VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_ADC_IN1, 0)
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#define RT274_SET_AMP_GAIN_ADC_IN2\
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VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_ADC_IN2, 0)
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#define RT274_GET_HP_SENSE\
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VERB_CMD(AC_VERB_GET_PIN_SENSE, RT274_HP_OUT, 0)
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#define RT274_GET_MIC_SENSE\
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VERB_CMD(AC_VERB_GET_PIN_SENSE, RT274_MIC, 0)
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#define RT274_SET_DMIC2_DEFAULT\
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VERB_CMD(AC_VERB_SET_CONFIG_DEFAULT_BYTES_3, RT274_DMIC2, 0)
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#define RT274_SET_SPDIF_DEFAULT\
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VERB_CMD(AC_VERB_SET_CONFIG_DEFAULT_BYTES_3, RT274_SPDIF, 0)
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#define RT274_DAC0L_GAIN\
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VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_DAC_OUT0, 0xa000)
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#define RT274_DAC0R_GAIN\
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VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_DAC_OUT0, 0x9000)
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#define RT274_DAC1L_GAIN\
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VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_DAC_OUT1, 0xa000)
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#define RT274_DAC1R_GAIN\
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VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_DAC_OUT1, 0x9000)
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#define RT274_ADCL_GAIN\
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VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_ADC_IN1, 0x6000)
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#define RT274_ADCR_GAIN\
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VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_ADC_IN1, 0x5000)
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#define RT274_MIC_GAIN\
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VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_MIC, 0x7000)
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#define RT274_LOUTL_GAIN\
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VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_LINE3, 0xa000)
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#define RT274_LOUTR_GAIN\
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VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_LINE3, 0x9000)
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#define RT274_HPOL_GAIN\
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VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_HP_OUT, 0xa000)
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#define RT274_HPOR_GAIN\
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VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, RT274_HP_OUT, 0x9000)
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#define RT274_DAC_FORMAT\
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VERB_CMD(AC_VERB_SET_STREAM_FORMAT, RT274_DAC_OUT0, 0)
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#define RT274_ADC_FORMAT\
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VERB_CMD(AC_VERB_SET_STREAM_FORMAT, RT274_ADC_IN1, 0)
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#define RT274_COEF_INDEX\
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VERB_CMD(AC_VERB_SET_COEF_INDEX, RT274_VENDOR_REGISTERS, 0)
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#define RT274_PROC_COEF\
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VERB_CMD(AC_VERB_SET_PROC_COEF, RT274_VENDOR_REGISTERS, 0)
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#define RT274_UNSOLICITED_INLINE_CMD\
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VERB_CMD(AC_VERB_SET_UNSOLICITED_ENABLE, RT274_INLINE_CMD, 0)
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#define RT274_UNSOLICITED_HP_OUT\
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VERB_CMD(AC_VERB_SET_UNSOLICITED_ENABLE, RT274_HP_OUT, 0)
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#define RT274_UNSOLICITED_MIC\
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VERB_CMD(AC_VERB_SET_UNSOLICITED_ENABLE, RT274_MIC, 0)
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#define RT274_COEF58_INDEX\
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VERB_CMD(AC_VERB_SET_COEF_INDEX, 0x58, 0)
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#define RT274_COEF58_COEF\
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VERB_CMD(AC_VERB_SET_PROC_COEF, 0x58, 0)
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#define RT274_COEF5b_INDEX\
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VERB_CMD(AC_VERB_SET_COEF_INDEX, 0x5b, 0)
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#define RT274_COEF5b_COEF\
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VERB_CMD(AC_VERB_SET_PROC_COEF, 0x5b, 0)
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#define RT274_SET_STREAMID_DAC0\
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VERB_CMD(AC_VERB_SET_CHANNEL_STREAMID, RT274_DAC_OUT0, 0)
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#define RT274_SET_STREAMID_DAC1\
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VERB_CMD(AC_VERB_SET_CHANNEL_STREAMID, RT274_DAC_OUT1, 0)
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#define RT274_SET_STREAMID_ADC1\
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VERB_CMD(AC_VERB_SET_CHANNEL_STREAMID, RT274_ADC_IN1, 0)
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#define RT274_SET_STREAMID_ADC2\
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VERB_CMD(AC_VERB_SET_CHANNEL_STREAMID, RT274_ADC_IN2, 0)
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/* Index registers */
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#define RT274_EAPD_GPIO_IRQ_CTRL 0x10
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#define RT274_PAD_CTRL12 0x35
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#define RT274_I2S_CTRL1 0x63
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#define RT274_I2S_CTRL2 0x64
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#define RT274_MCLK_CTRL 0x71
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#define RT274_CLK_CTRL 0x72
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#define RT274_PLL2_CTRL 0x7b
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/* EAPD GPIO IRQ control (Index 0x10) */
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#define RT274_IRQ_DIS (0x0 << 13)
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#define RT274_IRQ_EN (0x1 << 13)
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#define RT274_IRQ_CLR (0x1 << 12)
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#define RT274_GPI2_SEL_MASK (0x3 << 7)
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#define RT274_GPI2_SEL_GPIO2 (0x0 << 7)
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#define RT274_GPI2_SEL_I2S (0x1 << 7)
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#define RT274_GPI2_SEL_DMIC_CLK (0x2 << 7)
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#define RT274_GPI2_SEL_CBJ (0x3 << 7)
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/* Front I2S_Interface control 1 (Index 0x63) */
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#define RT274_I2S_MODE_MASK (0x1 << 11)
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#define RT274_I2S_MODE_S (0x0 << 11)
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#define RT274_I2S_MODE_M (0x1 << 11)
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#define RT274_TDM_DIS (0x0 << 10)
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#define RT274_TDM_EN (0x1 << 10)
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#define RT274_TDM_CH_NUM (0x1 << 7)
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#define RT274_TDM_2CH (0x0 << 7)
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#define RT274_TDM_4CH (0x1 << 7)
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#define RT274_I2S_FMT_MASK (0x3 << 8)
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#define RT274_I2S_FMT_I2S (0x0 << 8)
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#define RT274_I2S_FMT_LJ (0x1 << 8)
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#define RT274_I2S_FMT_PCMA (0x2 << 8)
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#define RT274_I2S_FMT_PCMB (0x3 << 8)
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/* MCLK clock domain control (Index 0x71) */
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#define RT274_MCLK_MODE_MASK (0x1 << 14)
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#define RT274_MCLK_MODE_DIS (0x0 << 14)
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#define RT274_MCLK_MODE_EN (0x1 << 14)
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/* Clock control (Index 0x72) */
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#define RT274_CLK_SRC_MASK (0x7 << 3)
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#define RT274_CLK_SRC_MCLK (0x0 << 3)
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#define RT274_CLK_SRC_PLL2 (0x3 << 3)
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/* PLL2 control (Index 0x7b) */
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#define RT274_PLL2_SRC_MASK (0x1 << 13)
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#define RT274_PLL2_SRC_MCLK (0x0 << 13)
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#define RT274_PLL2_SRC_BCLK (0x1 << 13)
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/* HP-OUT (0x21) */
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#define RT274_M_HP_MUX_SFT 14
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#define RT274_HP_SEL_MASK 0x1
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#define RT274_HP_SEL_SFT 0
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#define RT274_HP_SEL_F 0
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#define RT274_HP_SEL_S 1
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/* ADC (0x22) (0x23) */
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#define RT274_ADC_SEL_MASK 0x7
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#define RT274_ADC_SEL_SFT 0
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#define RT274_ADC_SEL_MIC 0
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#define RT274_ADC_SEL_LINE1 1
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#define RT274_ADC_SEL_LINE2 2
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#define RT274_ADC_SEL_DMIC 3
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#define RT274_SCLK_S_MCLK 0
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#define RT274_SCLK_S_PLL1 1
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#define RT274_SCLK_S_PLL2 2
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#define RT274_PLL2_S_MCLK 0
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#define RT274_PLL2_S_BCLK 1
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enum {
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RT274_AIF1,
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RT274_AIFS,
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};
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#endif /* __RT274_H__ */
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