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658fa754cd
The ARMv8-M architecture introduces 'tt' and 'ttt' instructions,
which means we can no longer use 'tt' as a register alias on recent
versions of binutils for ARM. So replace the alias with 'ttab'.
Fixes: 81edb42629 ("crypto: arm/aes - replace scalar AES cipher")
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
180 lines
3.4 KiB
ArmAsm
180 lines
3.4 KiB
ArmAsm
/*
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* Scalar AES core transform
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*
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* Copyright (C) 2017 Linaro Ltd.
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* Author: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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.text
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.align 5
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rk .req r0
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rounds .req r1
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in .req r2
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out .req r3
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ttab .req ip
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t0 .req lr
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t1 .req r2
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t2 .req r3
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.macro __select, out, in, idx
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.if __LINUX_ARM_ARCH__ < 7
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and \out, \in, #0xff << (8 * \idx)
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.else
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ubfx \out, \in, #(8 * \idx), #8
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.endif
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.endm
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.macro __load, out, in, idx
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.if __LINUX_ARM_ARCH__ < 7 && \idx > 0
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ldr \out, [ttab, \in, lsr #(8 * \idx) - 2]
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.else
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ldr \out, [ttab, \in, lsl #2]
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.endif
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.endm
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.macro __hround, out0, out1, in0, in1, in2, in3, t3, t4, enc
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__select \out0, \in0, 0
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__select t0, \in1, 1
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__load \out0, \out0, 0
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__load t0, t0, 1
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.if \enc
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__select \out1, \in1, 0
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__select t1, \in2, 1
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.else
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__select \out1, \in3, 0
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__select t1, \in0, 1
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.endif
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__load \out1, \out1, 0
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__select t2, \in2, 2
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__load t1, t1, 1
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__load t2, t2, 2
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eor \out0, \out0, t0, ror #24
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__select t0, \in3, 3
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.if \enc
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__select \t3, \in3, 2
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__select \t4, \in0, 3
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.else
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__select \t3, \in1, 2
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__select \t4, \in2, 3
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.endif
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__load \t3, \t3, 2
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__load t0, t0, 3
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__load \t4, \t4, 3
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eor \out1, \out1, t1, ror #24
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eor \out0, \out0, t2, ror #16
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ldm rk!, {t1, t2}
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eor \out1, \out1, \t3, ror #16
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eor \out0, \out0, t0, ror #8
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eor \out1, \out1, \t4, ror #8
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eor \out0, \out0, t1
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eor \out1, \out1, t2
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.endm
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.macro fround, out0, out1, out2, out3, in0, in1, in2, in3
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__hround \out0, \out1, \in0, \in1, \in2, \in3, \out2, \out3, 1
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__hround \out2, \out3, \in2, \in3, \in0, \in1, \in1, \in2, 1
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.endm
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.macro iround, out0, out1, out2, out3, in0, in1, in2, in3
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__hround \out0, \out1, \in0, \in3, \in2, \in1, \out2, \out3, 0
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__hround \out2, \out3, \in2, \in1, \in0, \in3, \in1, \in0, 0
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.endm
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.macro __rev, out, in
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.if __LINUX_ARM_ARCH__ < 6
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lsl t0, \in, #24
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and t1, \in, #0xff00
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and t2, \in, #0xff0000
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orr \out, t0, \in, lsr #24
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orr \out, \out, t1, lsl #8
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orr \out, \out, t2, lsr #8
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.else
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rev \out, \in
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.endif
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.endm
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.macro __adrl, out, sym, c
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.if __LINUX_ARM_ARCH__ < 7
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ldr\c \out, =\sym
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.else
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movw\c \out, #:lower16:\sym
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movt\c \out, #:upper16:\sym
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.endif
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.endm
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.macro do_crypt, round, ttab, ltab
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push {r3-r11, lr}
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ldr r4, [in]
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ldr r5, [in, #4]
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ldr r6, [in, #8]
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ldr r7, [in, #12]
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ldm rk!, {r8-r11}
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#ifdef CONFIG_CPU_BIG_ENDIAN
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__rev r4, r4
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__rev r5, r5
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__rev r6, r6
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__rev r7, r7
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#endif
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eor r4, r4, r8
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eor r5, r5, r9
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eor r6, r6, r10
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eor r7, r7, r11
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__adrl ttab, \ttab
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tst rounds, #2
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bne 1f
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0: \round r8, r9, r10, r11, r4, r5, r6, r7
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\round r4, r5, r6, r7, r8, r9, r10, r11
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1: subs rounds, rounds, #4
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\round r8, r9, r10, r11, r4, r5, r6, r7
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__adrl ttab, \ltab, ls
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\round r4, r5, r6, r7, r8, r9, r10, r11
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bhi 0b
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#ifdef CONFIG_CPU_BIG_ENDIAN
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__rev r4, r4
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__rev r5, r5
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__rev r6, r6
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__rev r7, r7
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#endif
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ldr out, [sp]
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str r4, [out]
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str r5, [out, #4]
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str r6, [out, #8]
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str r7, [out, #12]
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pop {r3-r11, pc}
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.align 3
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.ltorg
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.endm
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ENTRY(__aes_arm_encrypt)
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do_crypt fround, crypto_ft_tab, crypto_fl_tab
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ENDPROC(__aes_arm_encrypt)
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ENTRY(__aes_arm_decrypt)
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do_crypt iround, crypto_it_tab, crypto_il_tab
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ENDPROC(__aes_arm_decrypt)
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