linux/arch/riscv
Greentime Hu 8ee0b41898
riscv: signal: Add sigcontext save/restore for vector
This patch facilitates the existing fp-reserved words for placement of
the first extension's context header on the user's sigframe. A context
header consists of a distinct magic word and the size, including the
header itself, of an extension on the stack. Then, the frame is followed
by the context of that extension, and then a header + context body for
another extension if exists. If there is no more extension to come, then
the frame must be ended with a null context header. A special case is
rv64gc, where the kernel support no extensions requiring to expose
additional regfile to the user. In such case the kernel would place the
null context header right after the first reserved word of
__riscv_q_ext_state when saving sigframe. And the kernel would check if
all reserved words are zeros when a signal handler returns.

__riscv_q_ext_state---->|	|<-__riscv_extra_ext_header
			~	~
	.reserved[0]--->|0	|<-	.reserved
		<-------|magic	|<-	.hdr
		|	|size	|_______ end of sc_fpregs
		|	|ext-bdy|
		|	~	~
	+)size	------->|magic	|<- another context header
			|size	|
			|ext-bdy|
			~	~
			|magic:0|<- null context header
			|size:0	|

The vector registers will be saved in datap pointer. The datap pointer
will be allocated dynamically when the task needs in kernel space. On
the other hand, datap pointer on the sigframe will be set right after
the __riscv_v_ext_state data structure.

Co-developed-by: Vincent Chen <vincent.chen@sifive.com>
Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Suggested-by: Vineet Gupta <vineetg@rivosinc.com>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Co-developed-by: Andy Chiu <andy.chiu@sifive.com>
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Link: https://lore.kernel.org/r/20230605110724.21391-15-andy.chiu@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-06-08 07:16:47 -07:00
..
boot RISC-V Patches for the 6.4 Merge Window, Part 1 2023-04-28 16:55:39 -07:00
configs Remove orphaned CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT 2023-03-27 13:12:09 +02:00
errata RISC-V: fix sifive and thead section mismatches in errata 2023-04-29 13:18:19 -07:00
include riscv: signal: Add sigcontext save/restore for vector 2023-06-08 07:16:47 -07:00
kernel riscv: signal: Add sigcontext save/restore for vector 2023-06-08 07:16:47 -07:00
kvm RISC-V Patches for the 6.4 Merge Window, Part 2 2023-05-05 12:23:33 -07:00
lib riscv: Allow to downgrade paging mode from the command line 2023-04-26 07:30:52 -07:00
mm riscv: mm: remove redundant parameter of create_fdt_early_page_table 2023-04-29 13:03:01 -07:00
net Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net 2023-03-09 22:22:11 -08:00
purgatory purgatory: fix disabling debug info 2023-04-08 19:36:53 +09:00
tools riscv: Check relocations at compile time 2023-04-19 07:46:32 -07:00
Kbuild riscv: move errata/ and kvm/ builds to arch/riscv/Kbuild 2022-06-01 22:26:32 -07:00
Kconfig RISC-V Patches for the 6.4 Merge Window, Part 2 2023-05-05 12:23:33 -07:00
Kconfig.debug RISC-V: Remove EARLY_PRINTK support 2018-12-17 10:23:46 -08:00
Kconfig.errata Merge patch series "RISC-V: Fixes for riscv_has_extension[un]likely()'s alternative dependency" 2023-03-29 12:26:38 -07:00
Kconfig.socs RISC-V Patches for the 6.3 Merge Window, Part 1 2023-02-25 11:14:08 -08:00
Makefile RISC-V Patches for the 6.4 Merge Window, Part 1 2023-04-28 16:55:39 -07:00
Makefile.postlink riscv: Use --emit-relocs in order to move .rela.dyn in init 2023-04-19 07:46:33 -07:00