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529ed12752
Instead of having individual PHY drivers set the SUPPORTED_Pause and
SUPPORTED_Asym_Pause flags, phylib itself should set those flags,
unless there is a hardware erratum or other special case. During
autonegotiation, the PHYs will determine whether to enable pause
frame support.
Pause frames are a feature that is supported by the MAC. It is the MAC
that generates the frames and that processes them. The PHY can only be
configured to allow them to pass through.
This commit also effectively reverts the recently applied c7a61319
("net: phy: dp83848: Support ethernet pause frames").
So the new process is:
1) Unless the PHY driver overrides it, phylib sets the SUPPORTED_Pause
and SUPPORTED_AsymPause bits in phydev->supported. This indicates that
the PHY supports pause frames.
2) The MAC driver checks phydev->supported before it calls phy_start().
If (SUPPORTED_Pause | SUPPORTED_AsymPause) is set, then the MAC driver
sets those bits in phydev->advertising, if it wants to enable pause
frame support.
3) When the link state changes, the MAC driver checks phydev->pause and
phydev->asym_pause, If the bits are set, then it enables the corresponding
features in the MAC. The algorithm is:
if (phydev->pause)
The MAC should be programmed to receive and honor
pause frames it receives, i.e. enable receive flow control.
if (phydev->pause != phydev->asym_pause)
The MAC should be programmed to transmit pause
frames when needed, i.e. enable transmit flow control.
Signed-off-by: Timur Tabi <timur@codeaurora.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
117 lines
3.6 KiB
C
117 lines
3.6 KiB
C
/*
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* Driver for the Texas Instruments DP83848 PHY
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*
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* Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/phy.h>
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#define TI_DP83848C_PHY_ID 0x20005ca0
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#define NS_DP83848C_PHY_ID 0x20005c90
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#define TLK10X_PHY_ID 0x2000a210
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#define TI_DP83822_PHY_ID 0x2000a240
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/* Registers */
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#define DP83848_MICR 0x11 /* MII Interrupt Control Register */
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#define DP83848_MISR 0x12 /* MII Interrupt Status Register */
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/* MICR Register Fields */
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#define DP83848_MICR_INT_OE BIT(0) /* Interrupt Output Enable */
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#define DP83848_MICR_INTEN BIT(1) /* Interrupt Enable */
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/* MISR Register Fields */
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#define DP83848_MISR_RHF_INT_EN BIT(0) /* Receive Error Counter */
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#define DP83848_MISR_FHF_INT_EN BIT(1) /* False Carrier Counter */
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#define DP83848_MISR_ANC_INT_EN BIT(2) /* Auto-negotiation complete */
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#define DP83848_MISR_DUP_INT_EN BIT(3) /* Duplex Status */
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#define DP83848_MISR_SPD_INT_EN BIT(4) /* Speed status */
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#define DP83848_MISR_LINK_INT_EN BIT(5) /* Link status */
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#define DP83848_MISR_ED_INT_EN BIT(6) /* Energy detect */
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#define DP83848_MISR_LQM_INT_EN BIT(7) /* Link Quality Monitor */
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#define DP83848_INT_EN_MASK \
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(DP83848_MISR_ANC_INT_EN | \
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DP83848_MISR_DUP_INT_EN | \
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DP83848_MISR_SPD_INT_EN | \
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DP83848_MISR_LINK_INT_EN)
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static int dp83848_ack_interrupt(struct phy_device *phydev)
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{
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int err = phy_read(phydev, DP83848_MISR);
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return err < 0 ? err : 0;
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}
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static int dp83848_config_intr(struct phy_device *phydev)
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{
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int control, ret;
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control = phy_read(phydev, DP83848_MICR);
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if (control < 0)
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return control;
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
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control |= DP83848_MICR_INT_OE;
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control |= DP83848_MICR_INTEN;
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ret = phy_write(phydev, DP83848_MISR, DP83848_INT_EN_MASK);
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if (ret < 0)
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return ret;
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} else {
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control &= ~DP83848_MICR_INTEN;
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}
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return phy_write(phydev, DP83848_MICR, control);
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}
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static struct mdio_device_id __maybe_unused dp83848_tbl[] = {
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{ TI_DP83848C_PHY_ID, 0xfffffff0 },
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{ NS_DP83848C_PHY_ID, 0xfffffff0 },
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{ TLK10X_PHY_ID, 0xfffffff0 },
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{ TI_DP83822_PHY_ID, 0xfffffff0 },
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{ }
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};
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MODULE_DEVICE_TABLE(mdio, dp83848_tbl);
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#define DP83848_PHY_DRIVER(_id, _name) \
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{ \
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.phy_id = _id, \
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.phy_id_mask = 0xfffffff0, \
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.name = _name, \
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.features = PHY_BASIC_FEATURES, \
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.flags = PHY_HAS_INTERRUPT, \
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\
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.soft_reset = genphy_soft_reset, \
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.config_init = genphy_config_init, \
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.suspend = genphy_suspend, \
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.resume = genphy_resume, \
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.config_aneg = genphy_config_aneg, \
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.read_status = genphy_read_status, \
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\
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/* IRQ related */ \
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.ack_interrupt = dp83848_ack_interrupt, \
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.config_intr = dp83848_config_intr, \
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}
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static struct phy_driver dp83848_driver[] = {
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DP83848_PHY_DRIVER(TI_DP83848C_PHY_ID, "TI DP83848C 10/100 Mbps PHY"),
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DP83848_PHY_DRIVER(NS_DP83848C_PHY_ID, "NS DP83848C 10/100 Mbps PHY"),
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DP83848_PHY_DRIVER(TLK10X_PHY_ID, "TI TLK10X 10/100 Mbps PHY"),
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DP83848_PHY_DRIVER(TI_DP83822_PHY_ID, "TI DP83822 10/100 Mbps PHY"),
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};
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module_phy_driver(dp83848_driver);
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MODULE_DESCRIPTION("Texas Instruments DP83848 PHY driver");
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MODULE_AUTHOR("Andrew F. Davis <afd@ti.com");
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MODULE_LICENSE("GPL");
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