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e6550b3ee1
Based on the normalized pattern:
this program is free software you may redistribute it and/or modify it
under the terms of the gnu general public license as published by the
free software foundation version 2 of the license the software is
provided as is without warranty of any kind express or implied
including but not limited to the warranties of merchantability fitness
for a particular purpose and noninfringement in no event shall the
authors or copyright holders be liable for any claim damages or other
liability whether in an action of contract tort or otherwise arising
from out of or in connection with the software or the use or other
dealings in the software
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
68 lines
1.8 KiB
C
68 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright 2008 Cisco Systems, Inc. All rights reserved.
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* Copyright 2007 Nuova Systems, Inc. All rights reserved.
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*/
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#ifndef _FNIC_IO_H_
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#define _FNIC_IO_H_
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#include <scsi/fc/fc_fcp.h>
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#define FNIC_DFLT_SG_DESC_CNT 32
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#define FNIC_MAX_SG_DESC_CNT 256 /* Maximum descriptors per sgl */
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#define FNIC_SG_DESC_ALIGN 16 /* Descriptor address alignment */
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struct host_sg_desc {
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__le64 addr;
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__le32 len;
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u32 _resvd;
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};
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struct fnic_dflt_sgl_list {
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struct host_sg_desc sg_desc[FNIC_DFLT_SG_DESC_CNT];
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};
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struct fnic_sgl_list {
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struct host_sg_desc sg_desc[FNIC_MAX_SG_DESC_CNT];
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};
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enum fnic_sgl_list_type {
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FNIC_SGL_CACHE_DFLT = 0, /* cache with default size sgl */
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FNIC_SGL_CACHE_MAX, /* cache with max size sgl */
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FNIC_SGL_NUM_CACHES /* number of sgl caches */
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};
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enum fnic_ioreq_state {
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FNIC_IOREQ_NOT_INITED = 0,
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FNIC_IOREQ_CMD_PENDING,
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FNIC_IOREQ_ABTS_PENDING,
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FNIC_IOREQ_ABTS_COMPLETE,
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FNIC_IOREQ_CMD_COMPLETE,
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};
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struct fnic_io_req {
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struct host_sg_desc *sgl_list; /* sgl list */
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void *sgl_list_alloc; /* sgl list address used for free */
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dma_addr_t sense_buf_pa; /* dma address for sense buffer*/
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dma_addr_t sgl_list_pa; /* dma address for sgl list */
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u16 sgl_cnt;
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u8 sgl_type; /* device DMA descriptor list type */
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u8 io_completed:1; /* set to 1 when fw completes IO */
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u32 port_id; /* remote port DID */
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unsigned long start_time; /* in jiffies */
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struct completion *abts_done; /* completion for abts */
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struct completion *dr_done; /* completion for device reset */
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};
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enum fnic_port_speeds {
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DCEM_PORTSPEED_NONE = 0,
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DCEM_PORTSPEED_1G = 1000,
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DCEM_PORTSPEED_10G = 10000,
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DCEM_PORTSPEED_20G = 20000,
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DCEM_PORTSPEED_25G = 25000,
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DCEM_PORTSPEED_40G = 40000,
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DCEM_PORTSPEED_4x10G = 41000,
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DCEM_PORTSPEED_100G = 100000,
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};
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#endif /* _FNIC_IO_H_ */
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