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In the initial release of the ARM Architecture Reference Manual for ARMv8-A, the ESR_ELx registers were defined as 32-bit registers. This changed in 2018 with version D.a (ARM DDI 0487D.a) of the architecture, when they became 64-bit registers, with bits [63:32] defined as RES0. In version G.a, a new field was added to ESR_ELx, ISS2, which covers bits [36:32]. This field is used when the Armv8.7 extension FEAT_LS64 is implemented. As a result of the evolution of the register width, Linux stores it as both a 64-bit value and a 32-bit value, which hasn't affected correctness so far as Linux only uses the lower 32 bits of the register. Make the register type consistent and always treat it as 64-bit wide. The register is redefined as an "unsigned long", which is an unsigned double-word (64-bit quantity) for the LP64 machine (aapcs64 [1], Table 1, page 14). The type was chosen because "unsigned int" is the most frequent type for ESR_ELx and because FAR_ELx, which is used together with ESR_ELx in exception handling, is also declared as "unsigned long". The 64-bit type also makes adding support for architectural features that use fields above bit 31 easier in the future. The KVM hypervisor will receive a similar update in a subsequent patch. [1] https://github.com/ARM-software/abi-aa/releases/download/2021Q3/aapcs64.pdf Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220425114444.368693-4-alexandru.elisei@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
456 lines
11 KiB
C
456 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* ARMv8 single-step debug support and mdscr context switching.
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*
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* Copyright (C) 2012 ARM Limited
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*
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* Author: Will Deacon <will.deacon@arm.com>
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*/
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#include <linux/cpu.h>
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#include <linux/debugfs.h>
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#include <linux/hardirq.h>
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#include <linux/init.h>
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#include <linux/ptrace.h>
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#include <linux/kprobes.h>
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#include <linux/stat.h>
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#include <linux/uaccess.h>
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#include <linux/sched/task_stack.h>
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#include <asm/cpufeature.h>
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#include <asm/cputype.h>
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#include <asm/daifflags.h>
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#include <asm/debug-monitors.h>
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#include <asm/system_misc.h>
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#include <asm/traps.h>
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/* Determine debug architecture. */
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u8 debug_monitors_arch(void)
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{
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return cpuid_feature_extract_unsigned_field(read_sanitised_ftr_reg(SYS_ID_AA64DFR0_EL1),
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ID_AA64DFR0_DEBUGVER_SHIFT);
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}
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/*
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* MDSCR access routines.
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*/
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static void mdscr_write(u32 mdscr)
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{
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unsigned long flags;
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flags = local_daif_save();
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write_sysreg(mdscr, mdscr_el1);
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local_daif_restore(flags);
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}
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NOKPROBE_SYMBOL(mdscr_write);
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static u32 mdscr_read(void)
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{
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return read_sysreg(mdscr_el1);
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}
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NOKPROBE_SYMBOL(mdscr_read);
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/*
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* Allow root to disable self-hosted debug from userspace.
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* This is useful if you want to connect an external JTAG debugger.
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*/
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static bool debug_enabled = true;
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static int create_debug_debugfs_entry(void)
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{
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debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled);
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return 0;
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}
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fs_initcall(create_debug_debugfs_entry);
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static int __init early_debug_disable(char *buf)
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{
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debug_enabled = false;
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return 0;
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}
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early_param("nodebugmon", early_debug_disable);
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/*
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* Keep track of debug users on each core.
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* The ref counts are per-cpu so we use a local_t type.
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*/
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static DEFINE_PER_CPU(int, mde_ref_count);
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static DEFINE_PER_CPU(int, kde_ref_count);
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void enable_debug_monitors(enum dbg_active_el el)
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{
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u32 mdscr, enable = 0;
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WARN_ON(preemptible());
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if (this_cpu_inc_return(mde_ref_count) == 1)
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enable = DBG_MDSCR_MDE;
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if (el == DBG_ACTIVE_EL1 &&
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this_cpu_inc_return(kde_ref_count) == 1)
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enable |= DBG_MDSCR_KDE;
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if (enable && debug_enabled) {
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mdscr = mdscr_read();
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mdscr |= enable;
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mdscr_write(mdscr);
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}
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}
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NOKPROBE_SYMBOL(enable_debug_monitors);
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void disable_debug_monitors(enum dbg_active_el el)
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{
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u32 mdscr, disable = 0;
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WARN_ON(preemptible());
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if (this_cpu_dec_return(mde_ref_count) == 0)
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disable = ~DBG_MDSCR_MDE;
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if (el == DBG_ACTIVE_EL1 &&
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this_cpu_dec_return(kde_ref_count) == 0)
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disable &= ~DBG_MDSCR_KDE;
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if (disable) {
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mdscr = mdscr_read();
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mdscr &= disable;
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mdscr_write(mdscr);
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}
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}
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NOKPROBE_SYMBOL(disable_debug_monitors);
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/*
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* OS lock clearing.
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*/
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static int clear_os_lock(unsigned int cpu)
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{
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write_sysreg(0, osdlr_el1);
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write_sysreg(0, oslar_el1);
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isb();
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return 0;
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}
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static int __init debug_monitors_init(void)
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{
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return cpuhp_setup_state(CPUHP_AP_ARM64_DEBUG_MONITORS_STARTING,
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"arm64/debug_monitors:starting",
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clear_os_lock, NULL);
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}
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postcore_initcall(debug_monitors_init);
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/*
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* Single step API and exception handling.
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*/
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static void set_user_regs_spsr_ss(struct user_pt_regs *regs)
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{
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regs->pstate |= DBG_SPSR_SS;
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}
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NOKPROBE_SYMBOL(set_user_regs_spsr_ss);
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static void clear_user_regs_spsr_ss(struct user_pt_regs *regs)
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{
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regs->pstate &= ~DBG_SPSR_SS;
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}
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NOKPROBE_SYMBOL(clear_user_regs_spsr_ss);
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#define set_regs_spsr_ss(r) set_user_regs_spsr_ss(&(r)->user_regs)
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#define clear_regs_spsr_ss(r) clear_user_regs_spsr_ss(&(r)->user_regs)
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static DEFINE_SPINLOCK(debug_hook_lock);
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static LIST_HEAD(user_step_hook);
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static LIST_HEAD(kernel_step_hook);
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static void register_debug_hook(struct list_head *node, struct list_head *list)
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{
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spin_lock(&debug_hook_lock);
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list_add_rcu(node, list);
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spin_unlock(&debug_hook_lock);
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}
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static void unregister_debug_hook(struct list_head *node)
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{
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spin_lock(&debug_hook_lock);
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list_del_rcu(node);
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spin_unlock(&debug_hook_lock);
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synchronize_rcu();
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}
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void register_user_step_hook(struct step_hook *hook)
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{
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register_debug_hook(&hook->node, &user_step_hook);
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}
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void unregister_user_step_hook(struct step_hook *hook)
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{
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unregister_debug_hook(&hook->node);
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}
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void register_kernel_step_hook(struct step_hook *hook)
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{
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register_debug_hook(&hook->node, &kernel_step_hook);
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}
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void unregister_kernel_step_hook(struct step_hook *hook)
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{
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unregister_debug_hook(&hook->node);
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}
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/*
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* Call registered single step handlers
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* There is no Syndrome info to check for determining the handler.
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* So we call all the registered handlers, until the right handler is
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* found which returns zero.
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*/
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static int call_step_hook(struct pt_regs *regs, unsigned long esr)
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{
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struct step_hook *hook;
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struct list_head *list;
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int retval = DBG_HOOK_ERROR;
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list = user_mode(regs) ? &user_step_hook : &kernel_step_hook;
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/*
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* Since single-step exception disables interrupt, this function is
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* entirely not preemptible, and we can use rcu list safely here.
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*/
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list_for_each_entry_rcu(hook, list, node) {
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retval = hook->fn(regs, esr);
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if (retval == DBG_HOOK_HANDLED)
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break;
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}
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return retval;
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}
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NOKPROBE_SYMBOL(call_step_hook);
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static void send_user_sigtrap(int si_code)
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{
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struct pt_regs *regs = current_pt_regs();
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if (WARN_ON(!user_mode(regs)))
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return;
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if (interrupts_enabled(regs))
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local_irq_enable();
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arm64_force_sig_fault(SIGTRAP, si_code, instruction_pointer(regs),
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"User debug trap");
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}
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static int single_step_handler(unsigned long unused, unsigned long esr,
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struct pt_regs *regs)
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{
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bool handler_found = false;
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/*
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* If we are stepping a pending breakpoint, call the hw_breakpoint
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* handler first.
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*/
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if (!reinstall_suspended_bps(regs))
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return 0;
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if (!handler_found && call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
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handler_found = true;
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if (!handler_found && user_mode(regs)) {
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send_user_sigtrap(TRAP_TRACE);
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/*
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* ptrace will disable single step unless explicitly
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* asked to re-enable it. For other clients, it makes
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* sense to leave it enabled (i.e. rewind the controls
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* to the active-not-pending state).
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*/
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user_rewind_single_step(current);
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} else if (!handler_found) {
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pr_warn("Unexpected kernel single-step exception at EL1\n");
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/*
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* Re-enable stepping since we know that we will be
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* returning to regs.
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*/
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set_regs_spsr_ss(regs);
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}
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return 0;
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}
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NOKPROBE_SYMBOL(single_step_handler);
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static LIST_HEAD(user_break_hook);
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static LIST_HEAD(kernel_break_hook);
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void register_user_break_hook(struct break_hook *hook)
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{
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register_debug_hook(&hook->node, &user_break_hook);
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}
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void unregister_user_break_hook(struct break_hook *hook)
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{
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unregister_debug_hook(&hook->node);
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}
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void register_kernel_break_hook(struct break_hook *hook)
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{
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register_debug_hook(&hook->node, &kernel_break_hook);
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}
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void unregister_kernel_break_hook(struct break_hook *hook)
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{
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unregister_debug_hook(&hook->node);
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}
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static int call_break_hook(struct pt_regs *regs, unsigned long esr)
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{
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struct break_hook *hook;
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struct list_head *list;
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int (*fn)(struct pt_regs *regs, unsigned long esr) = NULL;
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list = user_mode(regs) ? &user_break_hook : &kernel_break_hook;
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/*
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* Since brk exception disables interrupt, this function is
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* entirely not preemptible, and we can use rcu list safely here.
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*/
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list_for_each_entry_rcu(hook, list, node) {
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unsigned long comment = esr & ESR_ELx_BRK64_ISS_COMMENT_MASK;
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if ((comment & ~hook->mask) == hook->imm)
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fn = hook->fn;
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}
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return fn ? fn(regs, esr) : DBG_HOOK_ERROR;
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}
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NOKPROBE_SYMBOL(call_break_hook);
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static int brk_handler(unsigned long unused, unsigned long esr,
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struct pt_regs *regs)
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{
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if (call_break_hook(regs, esr) == DBG_HOOK_HANDLED)
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return 0;
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if (user_mode(regs)) {
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send_user_sigtrap(TRAP_BRKPT);
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} else {
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pr_warn("Unexpected kernel BRK exception at EL1\n");
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return -EFAULT;
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}
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return 0;
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}
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NOKPROBE_SYMBOL(brk_handler);
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int aarch32_break_handler(struct pt_regs *regs)
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{
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u32 arm_instr;
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u16 thumb_instr;
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bool bp = false;
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void __user *pc = (void __user *)instruction_pointer(regs);
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if (!compat_user_mode(regs))
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return -EFAULT;
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if (compat_thumb_mode(regs)) {
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/* get 16-bit Thumb instruction */
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__le16 instr;
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get_user(instr, (__le16 __user *)pc);
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thumb_instr = le16_to_cpu(instr);
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if (thumb_instr == AARCH32_BREAK_THUMB2_LO) {
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/* get second half of 32-bit Thumb-2 instruction */
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get_user(instr, (__le16 __user *)(pc + 2));
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thumb_instr = le16_to_cpu(instr);
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bp = thumb_instr == AARCH32_BREAK_THUMB2_HI;
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} else {
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bp = thumb_instr == AARCH32_BREAK_THUMB;
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}
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} else {
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/* 32-bit ARM instruction */
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__le32 instr;
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get_user(instr, (__le32 __user *)pc);
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arm_instr = le32_to_cpu(instr);
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bp = (arm_instr & ~0xf0000000) == AARCH32_BREAK_ARM;
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}
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if (!bp)
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return -EFAULT;
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send_user_sigtrap(TRAP_BRKPT);
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return 0;
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}
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NOKPROBE_SYMBOL(aarch32_break_handler);
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void __init debug_traps_init(void)
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{
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hook_debug_fault_code(DBG_ESR_EVT_HWSS, single_step_handler, SIGTRAP,
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TRAP_TRACE, "single-step handler");
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hook_debug_fault_code(DBG_ESR_EVT_BRK, brk_handler, SIGTRAP,
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TRAP_BRKPT, "BRK handler");
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}
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/* Re-enable single step for syscall restarting. */
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void user_rewind_single_step(struct task_struct *task)
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{
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/*
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* If single step is active for this thread, then set SPSR.SS
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* to 1 to avoid returning to the active-pending state.
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*/
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if (test_tsk_thread_flag(task, TIF_SINGLESTEP))
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set_regs_spsr_ss(task_pt_regs(task));
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}
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NOKPROBE_SYMBOL(user_rewind_single_step);
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void user_fastforward_single_step(struct task_struct *task)
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{
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if (test_tsk_thread_flag(task, TIF_SINGLESTEP))
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clear_regs_spsr_ss(task_pt_regs(task));
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}
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void user_regs_reset_single_step(struct user_pt_regs *regs,
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struct task_struct *task)
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{
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if (test_tsk_thread_flag(task, TIF_SINGLESTEP))
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set_user_regs_spsr_ss(regs);
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else
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clear_user_regs_spsr_ss(regs);
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}
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/* Kernel API */
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void kernel_enable_single_step(struct pt_regs *regs)
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{
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WARN_ON(!irqs_disabled());
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set_regs_spsr_ss(regs);
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mdscr_write(mdscr_read() | DBG_MDSCR_SS);
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enable_debug_monitors(DBG_ACTIVE_EL1);
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}
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NOKPROBE_SYMBOL(kernel_enable_single_step);
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void kernel_disable_single_step(void)
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{
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WARN_ON(!irqs_disabled());
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mdscr_write(mdscr_read() & ~DBG_MDSCR_SS);
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disable_debug_monitors(DBG_ACTIVE_EL1);
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}
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NOKPROBE_SYMBOL(kernel_disable_single_step);
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int kernel_active_single_step(void)
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{
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WARN_ON(!irqs_disabled());
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return mdscr_read() & DBG_MDSCR_SS;
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}
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NOKPROBE_SYMBOL(kernel_active_single_step);
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/* ptrace API */
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void user_enable_single_step(struct task_struct *task)
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{
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struct thread_info *ti = task_thread_info(task);
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if (!test_and_set_ti_thread_flag(ti, TIF_SINGLESTEP))
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set_regs_spsr_ss(task_pt_regs(task));
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}
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NOKPROBE_SYMBOL(user_enable_single_step);
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void user_disable_single_step(struct task_struct *task)
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{
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clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
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}
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NOKPROBE_SYMBOL(user_disable_single_step);
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