mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-29 22:14:41 +08:00
d1bf7b4468
This file had several naming inconsistencies for eSDHC: - the instances were named sometimes SDn, sometimes SDHCn, whereas they are named ESDHCn in the reference manual, e.g.: MX25_PAD_SD1_CMD__SD1_CMD MX25_PAD_D15__SDHC1_DAT7 - the data ports were named sometimes DATAn, sometimes DATn like in the reference manual, e.g.: MX25_PAD_SD1_DATA0__SD1_DATA0 MX25_PAD_D15__SDHC1_DAT7 - in one case, the clock port was named DAT_CLK instead of CLK: MX25_PAD_CSI_D7__SDHC2_DAT_CLK This change: - introduces new definitions using the naming from the reference manual, - keeps definitions using the legacy naming in order not to break compatibility for out-of-tree users (they can be removed later), - updates the in-tree files that were using the legacy naming. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
185 lines
4.1 KiB
Plaintext
185 lines
4.1 KiB
Plaintext
/*
|
|
* Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License
|
|
* as published by the Free Software Foundation; either version 2
|
|
* of the License, or (at your option) any later version.
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
#include "imx25-eukrea-cpuimx25.dtsi"
|
|
|
|
/ {
|
|
model = "Eukrea MBIMXSD25";
|
|
compatible = "eukrea,mbimxsd25-baseboard", "eukrea,cpuimx25", "fsl,imx25";
|
|
|
|
gpio_keys {
|
|
compatible = "gpio-keys";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_gpiokeys>;
|
|
|
|
bp1 {
|
|
label = "BP1";
|
|
gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
|
|
linux,code = <BTN_MISC>;
|
|
wakeup-source;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_gpioled>;
|
|
|
|
led1 {
|
|
label = "led1";
|
|
gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
|
|
linux,default-trigger = "heartbeat";
|
|
};
|
|
};
|
|
|
|
sound {
|
|
compatible = "eukrea,asoc-tlv320";
|
|
eukrea,model = "imx25-eukrea-tlv320aic23";
|
|
ssi-controller = <&ssi1>;
|
|
fsl,mux-int-port = <1>;
|
|
fsl,mux-ext-port = <5>;
|
|
};
|
|
};
|
|
|
|
&audmux {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_audmux>;
|
|
status = "okay";
|
|
};
|
|
|
|
&esdhc1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_esdhc1>;
|
|
cd-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c1 {
|
|
tlv320aic23: codec@1a {
|
|
compatible = "ti,tlv320aic23";
|
|
reg = <0x1a>;
|
|
};
|
|
};
|
|
|
|
&iomuxc {
|
|
imx25-eukrea-mbimxsd25-baseboard {
|
|
pinctrl_audmux: audmuxgrp {
|
|
fsl,pins = <
|
|
MX25_PAD_KPP_COL3__AUD5_TXFS 0xe0
|
|
MX25_PAD_KPP_COL2__AUD5_TXC 0xe0
|
|
MX25_PAD_KPP_COL1__AUD5_RXD 0xe0
|
|
MX25_PAD_KPP_COL0__AUD5_TXD 0xe0
|
|
>;
|
|
};
|
|
|
|
pinctrl_esdhc1: esdhc1grp {
|
|
fsl,pins = <
|
|
MX25_PAD_SD1_CMD__ESDHC1_CMD 0x400000c0
|
|
MX25_PAD_SD1_CLK__ESDHC1_CLK 0x400000c0
|
|
MX25_PAD_SD1_DATA0__ESDHC1_DAT0 0x400000c0
|
|
MX25_PAD_SD1_DATA1__ESDHC1_DAT1 0x400000c0
|
|
MX25_PAD_SD1_DATA2__ESDHC1_DAT2 0x400000c0
|
|
MX25_PAD_SD1_DATA3__ESDHC1_DAT3 0x400000c0
|
|
>;
|
|
};
|
|
|
|
pinctrl_gpiokeys: gpiokeysgrp {
|
|
fsl,pins = <MX25_PAD_VSTBY_ACK__GPIO_3_18 0x80000000>;
|
|
};
|
|
|
|
pinctrl_gpioled: gpioledgrp {
|
|
fsl,pins = <MX25_PAD_POWER_FAIL__GPIO_3_19 0x80000000>;
|
|
};
|
|
|
|
pinctrl_lcdc: lcdcgrp {
|
|
fsl,pins = <
|
|
MX25_PAD_LD0__LD0 0x1
|
|
MX25_PAD_LD1__LD1 0x1
|
|
MX25_PAD_LD2__LD2 0x1
|
|
MX25_PAD_LD3__LD3 0x1
|
|
MX25_PAD_LD4__LD4 0x1
|
|
MX25_PAD_LD5__LD5 0x1
|
|
MX25_PAD_LD6__LD6 0x1
|
|
MX25_PAD_LD7__LD7 0x1
|
|
MX25_PAD_LD8__LD8 0x1
|
|
MX25_PAD_LD9__LD9 0x1
|
|
MX25_PAD_LD10__LD10 0x1
|
|
MX25_PAD_LD11__LD11 0x1
|
|
MX25_PAD_LD12__LD12 0x1
|
|
MX25_PAD_LD13__LD13 0x1
|
|
MX25_PAD_LD14__LD14 0x1
|
|
MX25_PAD_LD15__LD15 0x1
|
|
MX25_PAD_GPIO_E__LD16 0x1
|
|
MX25_PAD_GPIO_F__LD17 0x1
|
|
MX25_PAD_HSYNC__HSYNC 0x80000000
|
|
MX25_PAD_VSYNC__VSYNC 0x80000000
|
|
MX25_PAD_LSCLK__LSCLK 0x80000000
|
|
MX25_PAD_OE_ACD__OE_ACD 0x80000000
|
|
MX25_PAD_CONTRAST__CONTRAST 0x80000000
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
fsl,pins = <
|
|
MX25_PAD_UART1_RTS__UART1_RTS 0xe0
|
|
MX25_PAD_UART1_CTS__UART1_CTS 0xe0
|
|
MX25_PAD_UART1_TXD__UART1_TXD 0x80000000
|
|
MX25_PAD_UART1_RXD__UART1_RXD 0xc0
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart2: uart2grp {
|
|
fsl,pins = <
|
|
MX25_PAD_UART2_RXD__UART2_RXD 0x80000000
|
|
MX25_PAD_UART2_TXD__UART2_TXD 0x80000000
|
|
MX25_PAD_UART2_RTS__UART2_RTS 0x80000000
|
|
MX25_PAD_UART2_CTS__UART2_CTS 0x80000000
|
|
>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&ssi1 {
|
|
codec-handle = <&tlv320aic23>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
uart-has-rtscts;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart2>;
|
|
uart-has-rtscts;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbhost1 {
|
|
phy_type = "serial";
|
|
dr_mode = "host";
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg {
|
|
external-vbus-divider;
|
|
status = "okay";
|
|
};
|