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73a0b6ee5d
This is a similar fixup like arm64 does, only handle translation faults in case of unexpected kfence report when alignment faults on ARM, see more from commit0bb1fbffc6("arm64: mm: kfence: only handle translation faults"). Fixes:75969686ec("ARM: 9166/1: Support KFENCE for ARM") Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
42 lines
916 B
C
42 lines
916 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ARCH_ARM_FAULT_H
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#define __ARCH_ARM_FAULT_H
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/*
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* Fault status register encodings. We steal bit 31 for our own purposes.
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*/
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#define FSR_LNX_PF (1 << 31)
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#define FSR_CM (1 << 13)
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#define FSR_WRITE (1 << 11)
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#define FSR_FS4 (1 << 10)
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#define FSR_FS3_0 (15)
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#define FSR_FS5_0 (0x3f)
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#ifdef CONFIG_ARM_LPAE
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#define FSR_FS_AEA 17
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#define FS_TRANS_NOLL 0x4
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#define FS_PERM_NOLL 0xC
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#define FS_MMU_NOLL_MASK 0x3C
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static inline int fsr_fs(unsigned int fsr)
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{
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return fsr & FSR_FS5_0;
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}
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#else
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#define FSR_FS_AEA 22
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#define FS_L1_TRANS 0x5
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#define FS_L2_TRANS 0x7
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#define FS_L1_PERM 0xD
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#define FS_L2_PERM 0xF
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static inline int fsr_fs(unsigned int fsr)
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{
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return (fsr & FSR_FS3_0) | (fsr & FSR_FS4) >> 6;
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}
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#endif
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void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
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void early_abt_enable(void);
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#endif /* __ARCH_ARM_FAULT_H */
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