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6ddabcb106
The hw_srnprot needs to be unmapped when gamecube_rtc_read_offset_from_sram returns.
Fixs: 86559400b3 (rtc: gamecube: Add a RTC driver for the GameCube, Wii and Wii U)
Signed-off-by: Yuan Can <yuancan@huawei.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20220511071354.46202-1-yuancan@huawei.com
380 lines
10 KiB
C
380 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Nintendo GameCube, Wii and Wii U RTC driver
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*
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* This driver is for the MX23L4005, more specifically its real-time clock and
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* SRAM storage. The value returned by the RTC counter must be added with the
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* offset stored in a bias register in SRAM (on the GameCube and Wii) or in
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* /config/rtc.xml (on the Wii U). The latter being very impractical to access
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* from Linux, this driver assumes the bootloader has read it and stored it in
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* SRAM like for the other two consoles.
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*
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* This device sits on a bus named EXI (which is similar to SPI), channel 0,
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* device 1. This driver assumes no other user of the EXI bus, which is
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* currently the case but would have to be reworked to add support for other
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* GameCube hardware exposed on this bus.
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*
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* References:
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* - https://wiiubrew.org/wiki/Hardware/RTC
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* - https://wiibrew.org/wiki/MX23L4005
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*
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* Copyright (C) 2018 rw-r-r-0644
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* Copyright (C) 2021 Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
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*
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* Based on rtc-gcn.c
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* Copyright (C) 2004-2009 The GameCube Linux Team
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* Copyright (C) 2005,2008,2009 Albert Herranz
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* Based on gamecube_time.c from Torben Nielsen.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/rtc.h>
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#include <linux/time.h>
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/* EXI registers */
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#define EXICSR 0
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#define EXICR 12
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#define EXIDATA 16
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/* EXI register values */
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#define EXICSR_DEV 0x380
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#define EXICSR_DEV1 0x100
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#define EXICSR_CLK 0x070
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#define EXICSR_CLK_1MHZ 0x000
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#define EXICSR_CLK_2MHZ 0x010
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#define EXICSR_CLK_4MHZ 0x020
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#define EXICSR_CLK_8MHZ 0x030
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#define EXICSR_CLK_16MHZ 0x040
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#define EXICSR_CLK_32MHZ 0x050
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#define EXICSR_INT 0x008
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#define EXICSR_INTSET 0x008
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#define EXICR_TSTART 0x001
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#define EXICR_TRSMODE 0x002
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#define EXICR_TRSMODE_IMM 0x000
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#define EXICR_TRSTYPE 0x00C
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#define EXICR_TRSTYPE_R 0x000
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#define EXICR_TRSTYPE_W 0x004
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#define EXICR_TLEN 0x030
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#define EXICR_TLEN32 0x030
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/* EXI registers values to access the RTC */
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#define RTC_EXICSR (EXICSR_DEV1 | EXICSR_CLK_8MHZ | EXICSR_INTSET)
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#define RTC_EXICR_W (EXICR_TSTART | EXICR_TRSMODE_IMM | EXICR_TRSTYPE_W | EXICR_TLEN32)
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#define RTC_EXICR_R (EXICR_TSTART | EXICR_TRSMODE_IMM | EXICR_TRSTYPE_R | EXICR_TLEN32)
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#define RTC_EXIDATA_W 0x80000000
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/* RTC registers */
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#define RTC_COUNTER 0x200000
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#define RTC_SRAM 0x200001
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#define RTC_SRAM_BIAS 0x200004
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#define RTC_SNAPSHOT 0x204000
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#define RTC_ONTMR 0x210000
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#define RTC_OFFTMR 0x210001
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#define RTC_TEST0 0x210004
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#define RTC_TEST1 0x210005
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#define RTC_TEST2 0x210006
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#define RTC_TEST3 0x210007
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#define RTC_CONTROL0 0x21000c
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#define RTC_CONTROL1 0x21000d
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/* RTC flags */
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#define RTC_CONTROL0_UNSTABLE_POWER 0x00000800
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#define RTC_CONTROL0_LOW_BATTERY 0x00000200
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struct priv {
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struct regmap *regmap;
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void __iomem *iob;
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u32 rtc_bias;
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};
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static int exi_read(void *context, u32 reg, u32 *data)
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{
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struct priv *d = (struct priv *)context;
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void __iomem *iob = d->iob;
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/* The spin loops here loop about 15~16 times each, so there is no need
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* to use a more expensive sleep method.
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*/
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/* Write register offset */
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iowrite32be(RTC_EXICSR, iob + EXICSR);
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iowrite32be(reg << 8, iob + EXIDATA);
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iowrite32be(RTC_EXICR_W, iob + EXICR);
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while (!(ioread32be(iob + EXICSR) & EXICSR_INTSET))
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cpu_relax();
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/* Read data */
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iowrite32be(RTC_EXICSR, iob + EXICSR);
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iowrite32be(RTC_EXICR_R, iob + EXICR);
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while (!(ioread32be(iob + EXICSR) & EXICSR_INTSET))
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cpu_relax();
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*data = ioread32be(iob + EXIDATA);
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/* Clear channel parameters */
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iowrite32be(0, iob + EXICSR);
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return 0;
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}
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static int exi_write(void *context, u32 reg, u32 data)
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{
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struct priv *d = (struct priv *)context;
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void __iomem *iob = d->iob;
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/* The spin loops here loop about 15~16 times each, so there is no need
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* to use a more expensive sleep method.
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*/
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/* Write register offset */
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iowrite32be(RTC_EXICSR, iob + EXICSR);
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iowrite32be(RTC_EXIDATA_W | (reg << 8), iob + EXIDATA);
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iowrite32be(RTC_EXICR_W, iob + EXICR);
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while (!(ioread32be(iob + EXICSR) & EXICSR_INTSET))
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cpu_relax();
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/* Write data */
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iowrite32be(RTC_EXICSR, iob + EXICSR);
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iowrite32be(data, iob + EXIDATA);
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iowrite32be(RTC_EXICR_W, iob + EXICR);
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while (!(ioread32be(iob + EXICSR) & EXICSR_INTSET))
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cpu_relax();
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/* Clear channel parameters */
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iowrite32be(0, iob + EXICSR);
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return 0;
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}
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static const struct regmap_bus exi_bus = {
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/* TODO: is that true? Not that it matters here, but still. */
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.fast_io = true,
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.reg_read = exi_read,
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.reg_write = exi_write,
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};
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static int gamecube_rtc_read_time(struct device *dev, struct rtc_time *t)
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{
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struct priv *d = dev_get_drvdata(dev);
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int ret;
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u32 counter;
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time64_t timestamp;
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ret = regmap_read(d->regmap, RTC_COUNTER, &counter);
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if (ret)
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return ret;
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/* Add the counter and the bias to obtain the timestamp */
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timestamp = (time64_t)d->rtc_bias + counter;
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rtc_time64_to_tm(timestamp, t);
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return 0;
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}
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static int gamecube_rtc_set_time(struct device *dev, struct rtc_time *t)
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{
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struct priv *d = dev_get_drvdata(dev);
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time64_t timestamp;
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/* Subtract the timestamp and the bias to obtain the counter value */
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timestamp = rtc_tm_to_time64(t);
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return regmap_write(d->regmap, RTC_COUNTER, timestamp - d->rtc_bias);
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}
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static int gamecube_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
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{
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struct priv *d = dev_get_drvdata(dev);
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int value;
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int control0;
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int ret;
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switch (cmd) {
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case RTC_VL_READ:
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ret = regmap_read(d->regmap, RTC_CONTROL0, &control0);
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if (ret)
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return ret;
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value = 0;
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if (control0 & RTC_CONTROL0_UNSTABLE_POWER)
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value |= RTC_VL_DATA_INVALID;
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if (control0 & RTC_CONTROL0_LOW_BATTERY)
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value |= RTC_VL_BACKUP_LOW;
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return put_user(value, (unsigned int __user *)arg);
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default:
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return -ENOIOCTLCMD;
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}
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}
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static const struct rtc_class_ops gamecube_rtc_ops = {
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.read_time = gamecube_rtc_read_time,
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.set_time = gamecube_rtc_set_time,
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.ioctl = gamecube_rtc_ioctl,
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};
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static int gamecube_rtc_read_offset_from_sram(struct priv *d)
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{
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struct device_node *np;
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int ret;
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struct resource res;
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void __iomem *hw_srnprot;
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u32 old;
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np = of_find_compatible_node(NULL, NULL, "nintendo,latte-srnprot");
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if (!np)
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np = of_find_compatible_node(NULL, NULL,
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"nintendo,hollywood-srnprot");
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if (!np) {
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pr_info("HW_SRNPROT not found, assuming a GameCube\n");
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return regmap_read(d->regmap, RTC_SRAM_BIAS, &d->rtc_bias);
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}
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ret = of_address_to_resource(np, 0, &res);
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of_node_put(np);
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if (ret) {
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pr_err("no io memory range found\n");
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return -1;
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}
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hw_srnprot = ioremap(res.start, resource_size(&res));
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old = ioread32be(hw_srnprot);
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/* TODO: figure out why we use this magic constant. I obtained it by
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* reading the leftover value after boot, after IOSU already ran.
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*
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* On my Wii U, setting this register to 1 prevents the console from
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* rebooting properly, so wiiubrew.org must be missing something.
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*
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* See https://wiiubrew.org/wiki/Hardware/Latte_registers
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*/
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if (old != 0x7bf)
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iowrite32be(0x7bf, hw_srnprot);
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/* Get the offset from RTC SRAM.
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*
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* Its default location on the GameCube and on the Wii is in the SRAM,
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* while on the Wii U the bootloader needs to fill it with the contents
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* of /config/rtc.xml on the SLC (the eMMC). We don’t do that from
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* Linux since it requires implementing a proprietary filesystem and do
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* file decryption, instead we require the bootloader to fill the same
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* SRAM address as on previous consoles.
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*/
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ret = regmap_read(d->regmap, RTC_SRAM_BIAS, &d->rtc_bias);
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if (ret) {
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pr_err("failed to get the RTC bias\n");
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iounmap(hw_srnprot);
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return -1;
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}
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/* Reset SRAM access to how it was before, our job here is done. */
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if (old != 0x7bf)
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iowrite32be(old, hw_srnprot);
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iounmap(hw_srnprot);
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return 0;
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}
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static const struct regmap_range rtc_rd_ranges[] = {
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regmap_reg_range(0x200000, 0x200010),
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regmap_reg_range(0x204000, 0x204000),
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regmap_reg_range(0x210000, 0x210001),
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regmap_reg_range(0x210004, 0x210007),
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regmap_reg_range(0x21000c, 0x21000d),
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};
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static const struct regmap_access_table rtc_rd_regs = {
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.yes_ranges = rtc_rd_ranges,
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.n_yes_ranges = ARRAY_SIZE(rtc_rd_ranges),
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};
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static const struct regmap_range rtc_wr_ranges[] = {
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regmap_reg_range(0x200000, 0x200010),
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regmap_reg_range(0x204000, 0x204000),
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regmap_reg_range(0x210000, 0x210001),
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regmap_reg_range(0x21000d, 0x21000d),
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};
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static const struct regmap_access_table rtc_wr_regs = {
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.yes_ranges = rtc_wr_ranges,
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.n_yes_ranges = ARRAY_SIZE(rtc_wr_ranges),
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};
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static const struct regmap_config gamecube_rtc_regmap_config = {
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.reg_bits = 24,
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.val_bits = 32,
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.rd_table = &rtc_rd_regs,
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.wr_table = &rtc_wr_regs,
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.max_register = 0x21000d,
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.name = "gamecube-rtc",
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};
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static int gamecube_rtc_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct rtc_device *rtc;
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struct priv *d;
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int ret;
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d = devm_kzalloc(dev, sizeof(struct priv), GFP_KERNEL);
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if (!d)
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return -ENOMEM;
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d->iob = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(d->iob))
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return PTR_ERR(d->iob);
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d->regmap = devm_regmap_init(dev, &exi_bus, d,
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&gamecube_rtc_regmap_config);
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if (IS_ERR(d->regmap))
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return PTR_ERR(d->regmap);
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ret = gamecube_rtc_read_offset_from_sram(d);
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if (ret)
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return ret;
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dev_dbg(dev, "SRAM bias: 0x%x", d->rtc_bias);
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dev_set_drvdata(dev, d);
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rtc = devm_rtc_allocate_device(dev);
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if (IS_ERR(rtc))
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return PTR_ERR(rtc);
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/* We can represent further than that, but it depends on the stored
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* bias and we can’t modify it persistently on all supported consoles,
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* so here we pretend to be limited to 2106.
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*/
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rtc->range_min = 0;
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rtc->range_max = U32_MAX;
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rtc->ops = &gamecube_rtc_ops;
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devm_rtc_register_device(rtc);
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return 0;
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}
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static const struct of_device_id gamecube_rtc_of_match[] = {
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{.compatible = "nintendo,latte-exi" },
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{.compatible = "nintendo,hollywood-exi" },
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{.compatible = "nintendo,flipper-exi" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, gamecube_rtc_of_match);
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static struct platform_driver gamecube_rtc_driver = {
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.probe = gamecube_rtc_probe,
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.driver = {
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.name = "rtc-gamecube",
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.of_match_table = gamecube_rtc_of_match,
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},
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};
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module_platform_driver(gamecube_rtc_driver);
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MODULE_AUTHOR("Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>");
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MODULE_DESCRIPTION("Nintendo GameCube, Wii and Wii U RTC driver");
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MODULE_LICENSE("GPL");
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