linux/drivers/clk
Linus Torvalds dc2535be1f We have a fairly balanced mix of clk driver updates and clk framework
updates this time around. It's the usual pile of new drivers for new
 hardware out there and the normal small fixes and updates, but then we
 have some core framework changes too.
 
 In the core framework, we introduce support for a clk_get_optional() API
 to get clks that may not always be populated and a way to devm manage clkdev
 lookups registered by provider drivers. We also do some refactoring to simplify
 the interface between clkdev and the common clk framework so we can reuse the DT
 parsing and clk_get() path in provider drivers in the future. This work will
 continue in the next few cycles while we convert how providers specify clk
 parents.
 
 On the driver side, the biggest part of the dirstat is the Amlogic clk driver
 that got support for the G12A SoC. It dominates with almost half the overall
 diff, while the second largest part of the diff is in the i.MX clk driver
 that gained support for imx8mm SoCs. After that, we have the Actions Semiconductor
 and Qualcomm drivers rounding out the big part of the dirstat because they both
 got new hardware support for SoCs. The rest is just various updates and non-critical
 fixes for existing drivers.
 
 Core:
  - Convert a few clk bindings to JSON schema format
  - Add a {devm_}clk_get_optional() API
  - Add devm_clk_hw_register_clkdev() API to manage clkdev lookups
  - Start rewriting clk parent registration and supporting device links
    by moving around code that supports clk_get() and DT parsing of the
    'clocks' property
 
 New Drivers:
  - Add Qualcomm MSM8998 RPM managed clks
  - IPA clk support on Qualcomm RPMh clk controllers
  - Actions Semi S500 SoC clk support
  - Support for fixed rate clks populated from an MMIO register
  - Add RPC (QSPI/HyperFLASH) clocks on Renesas R-Car V3H
  - Add TMU (timer) clocks on Renesas RZ/G2E
  - Add Amlogic G12A Always-On Clock Controller
  - Add 32k clock generation for Amlogic AXG
  - Add support for the Mali GPU clocks on Amlogic Meson8
  - Add Amlogic G12A EE clock controller driver
  - Add missing CANFD clocks on Renesas RZ/G2M and RZ/G2E
  - Add i.MX8MM SoC clk driver support
 
 Removed Drivers:
  - Remove clps711x driver as the board support is gone
 
 Updates:
  - 3rd ECO fix for Mediatek MT2712 SoCs
  - Updates for Qualcomm MSM8998 GCC clks
  - Random static analysis fixes for clk drivers
  - Support for sleeping gpios in the clk-gpio type
  - Minor fixes for STM32MP1 clk driver (parents, critical flag, etc.)
  - Split LCDC into two clks on the Marvell MMP2 SoC
  - Various DT of_node refcount fixes
  - Get rid of CLK_IS_BASIC from TI code (yay!)
  - TI Autoidle clk support
  - Fix Amlogic Meson8 APB clock ID name
  - Claim input clocks through DT for Amlogic AXG and GXBB
  - Correct the DU (display unit) parent clock on Renesas RZ/G2E
  - Exynos5433 IMEM CMU crypto clk support (SlimSS)
  - Fix for the PLL-MIPI on the Allwinner A23
  - Fix Rockchip rk3328 PLL rate calculation
  - Add SET_RATE_PARENT flag on display clk of Rockhip rk3066
  - i.MX SCU clk driver clk_set_parent() and cpufreq support
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk subsystem updates from Stephen Boyd:
 "We have a fairly balanced mix of clk driver updates and clk framework
  updates this time around. It's the usual pile of new drivers for new
  hardware out there and the normal small fixes and updates, but then we
  have some core framework changes too.

  In the core framework, we introduce support for a clk_get_optional()
  API to get clks that may not always be populated and a way to devm
  manage clkdev lookups registered by provider drivers. We also do some
  refactoring to simplify the interface between clkdev and the common
  clk framework so we can reuse the DT parsing and clk_get() path in
  provider drivers in the future. This work will continue in the next
  few cycles while we convert how providers specify clk parents.

  On the driver side, the biggest part of the dirstat is the Amlogic clk
  driver that got support for the G12A SoC. It dominates with almost
  half the overall diff, while the second largest part of the diff is in
  the i.MX clk driver that gained support for imx8mm SoCs. After that,
  we have the Actions Semiconductor and Qualcomm drivers rounding out
  the big part of the dirstat because they both got new hardware support
  for SoCs. The rest is just various updates and non-critical fixes for
  existing drivers.

  Core:
   - Convert a few clk bindings to JSON schema format
   - Add a {devm_}clk_get_optional() API
   - Add devm_clk_hw_register_clkdev() API to manage clkdev lookups
   - Start rewriting clk parent registration and supporting device links
     by moving around code that supports clk_get() and DT parsing of the
     'clocks' property

  New Drivers:
   - Add Qualcomm MSM8998 RPM managed clks
   - IPA clk support on Qualcomm RPMh clk controllers
   - Actions Semi S500 SoC clk support
   - Support for fixed rate clks populated from an MMIO register
   - Add RPC (QSPI/HyperFLASH) clocks on Renesas R-Car V3H
   - Add TMU (timer) clocks on Renesas RZ/G2E
   - Add Amlogic G12A Always-On Clock Controller
   - Add 32k clock generation for Amlogic AXG
   - Add support for the Mali GPU clocks on Amlogic Meson8
   - Add Amlogic G12A EE clock controller driver
   - Add missing CANFD clocks on Renesas RZ/G2M and RZ/G2E
   - Add i.MX8MM SoC clk driver support

  Removed Drivers:
   - Remove clps711x driver as the board support is gone

  Updates:
   - 3rd ECO fix for Mediatek MT2712 SoCs
   - Updates for Qualcomm MSM8998 GCC clks
   - Random static analysis fixes for clk drivers
   - Support for sleeping gpios in the clk-gpio type
   - Minor fixes for STM32MP1 clk driver (parents, critical flag, etc.)
   - Split LCDC into two clks on the Marvell MMP2 SoC
   - Various DT of_node refcount fixes
   - Get rid of CLK_IS_BASIC from TI code (yay!)
   - TI Autoidle clk support
   - Fix Amlogic Meson8 APB clock ID name
   - Claim input clocks through DT for Amlogic AXG and GXBB
   - Correct the DU (display unit) parent clock on Renesas RZ/G2E
   - Exynos5433 IMEM CMU crypto clk support (SlimSS)
   - Fix for the PLL-MIPI on the Allwinner A23
   - Fix Rockchip rk3328 PLL rate calculation
   - Add SET_RATE_PARENT flag on display clk of Rockhip rk3066
   - i.MX SCU clk driver clk_set_parent() and cpufreq support"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits)
  dt-bindings: clock: imx8mq: Fix numbering overlaps and gaps
  clk: ti: clkctrl: Fix clkdm_name regression for TI_CLK_CLKCTRL_COMPAT
  clk: fixup default index for of_clk_get_by_name()
  clk: Move of_clk_*() APIs into clk.c from clkdev.c
  clk: Inform the core about consumer devices
  clk: Introduce of_clk_get_hw_from_clkspec()
  clk: core: clarify the check for runtime PM
  clk: Combine __clk_get() and __clk_create_clk()
  clk: imx8mq: add GPIO clocks to clock tree
  clk: mediatek: correct cpu clock name for MT8173 SoC
  clk: imx: Refactor entire sccg pll clk
  clk: imx: scu: add cpu frequency scaling support
  clk: mediatek: Mark bus and DRAM related clocks as critical
  clk: mediatek: Add flags to mtk_gate
  clk: mediatek: Add MUX_FLAGS macro
  clk: qcom: gcc-sdm845: Define parent of PCIe PIPE clocks
  clk: ingenic: Remove set but not used variable 'enable'
  clk: at91: programmable: remove unneeded register read
  clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel
  clk: mediatek: add MUX_GATE_FLAGS_2
  ...
2019-03-14 08:46:17 -07:00
..
actions clk: actions: Add clock driver for S500 SoC 2019-02-22 00:01:08 -08:00
at91 Merge branch 'clk-at91' into clk-next 2019-03-08 10:29:47 -08:00
axis
axs10x clk: Convert to using %pOFn instead of device_node.name 2018-08-30 09:50:20 -07:00
bcm Merge branches 'clk-managed-registration', 'clk-spdx', 'clk-remove-basic' and 'clk-ops-const' into clk-next 2018-12-14 13:33:44 -08:00
berlin This time we have a good set of changes to the core framework that do some 2018-06-09 12:06:24 -07:00
davinci clk: davinci: kill davinci_clk_reset_assert/deassert() 2018-10-02 08:54:14 -07:00
h8300 clk: h8300: Remove usage of CLK_IS_BASIC 2018-12-10 14:43:21 -08:00
hisilicon clk: hisilicon: Remove usage of CLK_IS_BASIC 2018-12-10 14:43:21 -08:00
imgtec clk: boston: unregister clks on failure in clk_boston_setup() 2018-11-08 10:14:41 -08:00
imx Merge branches 'clk-imx', 'clk-samsung', 'clk-ti', 'clk-uniphier-gear' and 'clk-mmp2-lcdc' into clk-next 2019-03-08 10:27:40 -08:00
ingenic clk: ingenic: Remove set but not used variable 'enable' 2019-02-26 09:41:04 -08:00
keystone Merge branch 'clk-k3-tisci' into clk-next 2018-10-18 15:40:10 -07:00
loongson1 clk: Loongson1: Remove usage of CLK_IS_BASIC 2018-12-10 14:44:08 -08:00
mediatek Merge branches 'clk-typo', 'clk-json-schema', 'clk-mtk-2712-eco' and 'clk-rockchip' into clk-next 2019-03-08 10:34:22 -08:00
meson clk: meson: meson8b: fix the naming of the APB clocks 2019-02-13 09:51:09 +01:00
microchip
mmp clk: mmp2: separate LCDC peripheral clk form the display clock 2019-02-21 13:52:02 -08:00
mvebu clk: dove: fix refcount leak in dove_clk_init() 2018-12-28 11:45:43 -08:00
mxs clk: mxs: make clk_ops const 2017-11-01 23:25:43 -07:00
nxp clk: lpc32xx: Set name of regmap_config 2018-03-19 14:35:16 -07:00
pistachio clk: pistachio: constify clk_ops structures 2018-11-06 09:41:49 -08:00
pxa clk: pxa: constify clk_ops structures 2018-11-06 09:41:57 -08:00
qcom Merge branches 'clk-ingenic', 'clk-mtk-mux', 'clk-qcom-sdm845-pcie', 'clk-mtk-crit' and 'clk-mtk' into clk-next 2019-03-08 10:29:30 -08:00
renesas clk: renesas: r8a774a1: Fix LAST_DT_CORE_CLK 2019-02-25 09:13:19 -08:00
rockchip clk: rockchip: add CLK_SET_RATE_PARENT for rk3066 lcdc dclks 2019-01-07 09:17:15 +01:00
samsung Merge branches 'clk-typo', 'clk-json-schema', 'clk-mtk-2712-eco' and 'clk-rockchip' into clk-next 2019-03-08 10:34:22 -08:00
sirf We have two changes to the core framework this time around. The first being a 2017-11-17 20:04:24 -08:00
socfpga Merge branches 'clk-of-refcount', 'clk-mmio-fixed-clock', 'clk-remove-clps', 'clk-socfpga-parent' and 'clk-struct-size' into clk-next 2019-03-08 10:26:59 -08:00
spear clk: spear: fix WDT clock definition on SPEAr600 2018-04-06 13:45:34 -07:00
sprd clk: sprd: add RTC gate for SC9860 2018-03-16 15:53:30 -07:00
st clk: st: Remove usage of CLK_IS_BASIC 2018-12-10 14:43:20 -08:00
sunxi clk: Convert to using %pOFn instead of device_node.name 2018-08-30 09:50:20 -07:00
sunxi-ng Merge branches 'clk-optional', 'clk-devm-clkdev-register', 'clk-allwinner', 'clk-meson' and 'clk-renesas' into clk-next 2019-03-08 10:27:21 -08:00
tegra We have a fairly balanced mix of clk driver updates and clk framework 2019-03-14 08:46:17 -07:00
ti We have a fairly balanced mix of clk driver updates and clk framework 2019-03-14 08:46:17 -07:00
uniphier clk: uniphier: Fix update register for CPU-gear 2019-02-21 13:50:23 -08:00
ux500 clk: Use of_node_name_eq for node name comparisons 2018-12-14 13:52:41 -08:00
versatile clk: versatile: sp810: Remove usage of CLK_IS_BASIC 2018-12-10 14:44:05 -08:00
x86 Merge branches 'clk-qcom-msm8998', 'clk-fractional-parent', 'clk-x86-mv' and 'clk-SA-fixes' into clk-next 2019-03-08 10:29:15 -08:00
zte clk: move clock common macros out from vendor directories 2017-12-21 15:00:38 -08:00
zynq clk: Convert to using %pOFn instead of device_node.name 2018-08-30 09:50:20 -07:00
zynqmp clk: zynqmp: Fix memory allocation in zynqmp_clk_setup 2019-01-09 10:37:01 -08:00
clk-asm9260.c clk: Convert to using %pOFn instead of device_node.name 2018-08-30 09:50:20 -07:00
clk-aspeed.c The new and exciting feature this time around is in the clk core. 2018-08-15 21:41:21 -07:00
clk-axi-clkgen.c clk: axi-clkgen: Round closest in round_rate() and recalc_rate() 2017-12-21 18:07:53 -08:00
clk-axm5516.c clk: axm5516: Remove usage of CLK_IS_BASIC 2018-12-10 14:43:21 -08:00
clk-bd718x7.c clk: bd718x7: Initial support for ROHM bd71837/bd71847 PMIC clock 2018-12-10 12:44:03 -08:00
clk-bulk.c clk: Tag clk core files with SPDX 2018-12-11 09:57:47 -08:00
clk-cdce706.c
clk-cdce925.c Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next 2018-10-18 15:33:52 -07:00
clk-clps711x.c clk: clps711x: Remove board support 2019-01-09 12:50:21 -08:00
clk-composite.c clk: Tag basic clk types with SPDX 2018-12-11 09:57:48 -08:00
clk-conf.c clk: Tag clk core files with SPDX 2018-12-11 09:57:47 -08:00
clk-cs2000-cp.c clk: cs2000-cp: convert to SPDX identifiers 2018-08-02 13:55:00 -07:00
clk-devres.c clk: Add (devm_)clk_get_optional() functions 2019-02-06 10:33:10 -08:00
clk-divider.c clk: Tag basic clk types with SPDX 2018-12-11 09:57:48 -08:00
clk-efm32gg.c treewide: Use struct_size() for kmalloc()-family 2018-06-06 11:15:43 -07:00
clk-fixed-factor.c Merge branch 'clk-fixes' into clk-next 2018-12-14 13:42:08 -08:00
clk-fixed-mmio.c clk: Add Fixed MMIO clock driver 2019-01-09 11:41:19 -08:00
clk-fixed-rate.c clk: Tag basic clk types with SPDX 2018-12-11 09:57:48 -08:00
clk-fractional-divider.c clk: fractional-divider: check parent rate only if flag is set 2019-02-22 00:11:47 -08:00
clk-gate.c clk: Tag basic clk types with SPDX 2018-12-11 09:57:48 -08:00
clk-gemini.c treewide: Use struct_size() for kmalloc()-family 2018-06-06 11:15:43 -07:00
clk-gpio.c clk: clk-gpio: add support for sleeping GPIOs in gpio-gate-clk 2019-02-21 14:05:25 -08:00
clk-hi655x.c clk: clk-hi655x: Free of_provider at remove 2018-12-05 09:20:29 -08:00
clk-highbank.c clk: highbank: fix refcount leak in hb_clk_init() 2018-12-28 11:20:48 -08:00
clk-hsdk-pll.c clk: Convert to using %pOFn instead of device_node.name 2018-08-30 09:50:20 -07:00
clk-max9485.c clk: Add driver for MAX9485 2018-07-06 13:44:06 -07:00
clk-max77686.c clk: clk-max77686: Clean clkdev lookup leak and use devm 2019-02-06 10:35:03 -08:00
clk-moxart.c clk: Convert to using %pOF instead of full_name 2017-07-21 15:49:54 -07:00
clk-multiplier.c clk: Tag basic clk types with SPDX 2018-12-11 09:57:48 -08:00
clk-mux.c clk: Tag basic clk types with SPDX 2018-12-11 09:57:48 -08:00
clk-nomadik.c clk: nomadik: Change to use DEFINE_SHOW_ATTRIBUTE macro 2018-11-28 14:13:18 -08:00
clk-npcm7xx.c This time it looks like a quieter release cycle in the clk tree. I guess that's 2018-10-31 11:08:30 -07:00
clk-nspire.c
clk-oxnas.c
clk-palmas.c clk: palmas: constify clk_ops structure 2018-11-06 09:41:44 -08:00
clk-pwm.c
clk-qoriq.c Merge branches 'clk-qcom-msm8998', 'clk-fractional-parent', 'clk-x86-mv' and 'clk-SA-fixes' into clk-next 2019-03-08 10:29:15 -08:00
clk-rk808.c clk: rk808: use managed version of of_provider registration 2018-12-05 09:20:35 -08:00
clk-s2mps11.c clk: s2mps11: constify clk_ops structure 2018-11-06 09:42:12 -08:00
clk-scmi.c clk: Convert to using %pOFn instead of device_node.name 2018-08-30 09:50:20 -07:00
clk-scpi.c clk: Convert to using %pOFn instead of device_node.name 2018-08-30 09:50:20 -07:00
clk-si514.c clk-si514, clk-si544: Implement prepare/unprepare/is_prepared operations 2018-06-29 10:59:40 -07:00
clk-si544.c clk-si514, clk-si544: Implement prepare/unprepare/is_prepared operations 2018-06-29 10:59:40 -07:00
clk-si570.c
clk-si5351.c clk: Convert to using %pOFn instead of device_node.name 2018-08-30 09:50:20 -07:00
clk-si5351.h
clk-stm32f4.c clk: Convert to using %pOFn instead of device_node.name 2018-08-30 09:50:20 -07:00
clk-stm32h7.c clk: Convert to using %pOFn instead of device_node.name 2018-08-30 09:50:20 -07:00
clk-stm32mp1.c clk: stm32mp1: fix bit width of hse_rtc divider 2019-02-21 14:13:22 -08:00
clk-tango4.c clk: Convert to using %pOFn instead of device_node.name 2018-08-30 09:50:20 -07:00
clk-twl6040.c clk: clk-twl6040: Fix imprecise external abort for pdmclk 2019-02-21 14:11:23 -08:00
clk-u300.c clk: clk-u300: Fix a typo in two comment lines 2017-11-13 17:39:43 -08:00
clk-versaclock5.c clk: vc5: Abort clock configuration without upstream clock 2019-01-09 10:53:58 -08:00
clk-vt8500.c
clk-wm831x.c clk: make clk_init_data const 2017-11-01 23:25:51 -07:00
clk-xgene.c clk: clk-xgene: Adjust six checks for null pointers 2017-11-13 17:40:03 -08:00
clk.c clk: fixup default index for of_clk_get_by_name() 2019-03-08 10:35:07 -08:00
clk.h clk: Move of_clk_*() APIs into clk.c from clkdev.c 2019-03-01 11:17:22 -08:00
clkdev.c Merge branch 'clk-parent-rewrite' (early part) into clk-next 2019-03-08 10:35:01 -08:00
Kconfig Merge branches 'clk-of-refcount', 'clk-mmio-fixed-clock', 'clk-remove-clps', 'clk-socfpga-parent' and 'clk-struct-size' into clk-next 2019-03-08 10:26:59 -08:00
Makefile Merge branches 'clk-optional', 'clk-devm-clkdev-register', 'clk-allwinner', 'clk-meson' and 'clk-renesas' into clk-next 2019-03-08 10:27:21 -08:00