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00f918f61c
To incrementally implement in-kernel AIA irqchip support, we first add minimal skeletal support which only compiles but does not provide any functionality. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Signed-off-by: Anup Patel <anup@brainfault.org>
216 lines
4.6 KiB
C
216 lines
4.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/uaccess.h>
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#include <linux/kvm_host.h>
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const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
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KVM_GENERIC_VM_STATS()
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};
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static_assert(ARRAY_SIZE(kvm_vm_stats_desc) ==
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sizeof(struct kvm_vm_stat) / sizeof(u64));
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const struct kvm_stats_header kvm_vm_stats_header = {
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.name_size = KVM_STATS_NAME_SIZE,
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.num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
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.id_offset = sizeof(struct kvm_stats_header),
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.desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
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.data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
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sizeof(kvm_vm_stats_desc),
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};
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int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
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{
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int r;
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r = kvm_riscv_gstage_alloc_pgd(kvm);
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if (r)
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return r;
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r = kvm_riscv_gstage_vmid_init(kvm);
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if (r) {
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kvm_riscv_gstage_free_pgd(kvm);
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return r;
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}
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kvm_riscv_aia_init_vm(kvm);
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kvm_riscv_guest_timer_init(kvm);
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return 0;
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}
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void kvm_arch_destroy_vm(struct kvm *kvm)
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{
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kvm_destroy_vcpus(kvm);
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kvm_riscv_aia_destroy_vm(kvm);
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}
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int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irql,
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bool line_status)
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{
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if (!irqchip_in_kernel(kvm))
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return -ENXIO;
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return kvm_riscv_aia_inject_irq(kvm, irql->irq, irql->level);
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}
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int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
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struct kvm *kvm, int irq_source_id,
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int level, bool line_status)
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{
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struct kvm_msi msi;
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if (!level)
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return -1;
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msi.address_lo = e->msi.address_lo;
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msi.address_hi = e->msi.address_hi;
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msi.data = e->msi.data;
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msi.flags = e->msi.flags;
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msi.devid = e->msi.devid;
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return kvm_riscv_aia_inject_msi(kvm, &msi);
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}
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static int kvm_riscv_set_irq(struct kvm_kernel_irq_routing_entry *e,
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struct kvm *kvm, int irq_source_id,
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int level, bool line_status)
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{
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return kvm_riscv_aia_inject_irq(kvm, e->irqchip.pin, level);
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}
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int kvm_riscv_setup_default_irq_routing(struct kvm *kvm, u32 lines)
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{
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struct kvm_irq_routing_entry *ents;
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int i, rc;
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ents = kcalloc(lines, sizeof(*ents), GFP_KERNEL);
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if (!ents)
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return -ENOMEM;
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for (i = 0; i < lines; i++) {
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ents[i].gsi = i;
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ents[i].type = KVM_IRQ_ROUTING_IRQCHIP;
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ents[i].u.irqchip.irqchip = 0;
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ents[i].u.irqchip.pin = i;
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}
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rc = kvm_set_irq_routing(kvm, ents, lines, 0);
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kfree(ents);
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return rc;
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}
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bool kvm_arch_can_set_irq_routing(struct kvm *kvm)
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{
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return irqchip_in_kernel(kvm);
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}
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int kvm_set_routing_entry(struct kvm *kvm,
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struct kvm_kernel_irq_routing_entry *e,
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const struct kvm_irq_routing_entry *ue)
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{
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int r = -EINVAL;
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switch (ue->type) {
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case KVM_IRQ_ROUTING_IRQCHIP:
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e->set = kvm_riscv_set_irq;
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e->irqchip.irqchip = ue->u.irqchip.irqchip;
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e->irqchip.pin = ue->u.irqchip.pin;
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if ((e->irqchip.pin >= KVM_IRQCHIP_NUM_PINS) ||
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(e->irqchip.irqchip >= KVM_NR_IRQCHIPS))
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goto out;
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break;
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case KVM_IRQ_ROUTING_MSI:
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e->set = kvm_set_msi;
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e->msi.address_lo = ue->u.msi.address_lo;
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e->msi.address_hi = ue->u.msi.address_hi;
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e->msi.data = ue->u.msi.data;
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e->msi.flags = ue->flags;
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e->msi.devid = ue->u.msi.devid;
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break;
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default:
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goto out;
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}
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r = 0;
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out:
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return r;
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}
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int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,
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struct kvm *kvm, int irq_source_id, int level,
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bool line_status)
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{
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if (!level)
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return -EWOULDBLOCK;
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switch (e->type) {
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case KVM_IRQ_ROUTING_MSI:
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return kvm_set_msi(e, kvm, irq_source_id, level, line_status);
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case KVM_IRQ_ROUTING_IRQCHIP:
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return kvm_riscv_set_irq(e, kvm, irq_source_id,
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level, line_status);
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}
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return -EWOULDBLOCK;
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}
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bool kvm_arch_irqchip_in_kernel(struct kvm *kvm)
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{
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return irqchip_in_kernel(kvm);
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}
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int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
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{
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int r;
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switch (ext) {
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case KVM_CAP_IRQCHIP:
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r = kvm_riscv_aia_available();
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break;
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case KVM_CAP_IOEVENTFD:
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case KVM_CAP_DEVICE_CTRL:
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case KVM_CAP_USER_MEMORY:
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case KVM_CAP_SYNC_MMU:
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case KVM_CAP_DESTROY_MEMORY_REGION_WORKS:
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case KVM_CAP_ONE_REG:
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case KVM_CAP_READONLY_MEM:
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case KVM_CAP_MP_STATE:
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case KVM_CAP_IMMEDIATE_EXIT:
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r = 1;
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break;
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case KVM_CAP_NR_VCPUS:
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r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS);
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break;
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case KVM_CAP_MAX_VCPUS:
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r = KVM_MAX_VCPUS;
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break;
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case KVM_CAP_NR_MEMSLOTS:
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r = KVM_USER_MEM_SLOTS;
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break;
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case KVM_CAP_VM_GPA_BITS:
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r = kvm_riscv_gstage_gpa_bits();
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break;
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default:
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r = 0;
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break;
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}
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return r;
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}
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int kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
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{
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return -EINVAL;
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}
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