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9823147da6
Some places were including event.h just to get 'struct perf_sample', move it to a separate place so that we speed up a bit the build. Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
718 lines
14 KiB
C
718 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <errno.h>
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#include <string.h>
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#include "perf_regs.h"
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#include "util/sample.h"
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int __weak arch_sdt_arg_parse_op(char *old_op __maybe_unused,
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char **new_op __maybe_unused)
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{
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return SDT_ARG_SKIP;
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}
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uint64_t __weak arch__intr_reg_mask(void)
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{
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return PERF_REGS_MASK;
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}
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uint64_t __weak arch__user_reg_mask(void)
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{
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return PERF_REGS_MASK;
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}
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#ifdef HAVE_PERF_REGS_SUPPORT
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#define perf_event_arm_regs perf_event_arm64_regs
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#include "../../arch/arm64/include/uapi/asm/perf_regs.h"
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#undef perf_event_arm_regs
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#include "../../arch/arm/include/uapi/asm/perf_regs.h"
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#include "../../arch/csky/include/uapi/asm/perf_regs.h"
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#include "../../arch/mips/include/uapi/asm/perf_regs.h"
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#include "../../arch/powerpc/include/uapi/asm/perf_regs.h"
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#include "../../arch/riscv/include/uapi/asm/perf_regs.h"
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#include "../../arch/s390/include/uapi/asm/perf_regs.h"
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#include "../../arch/x86/include/uapi/asm/perf_regs.h"
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static const char *__perf_reg_name_arm64(int id)
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{
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switch (id) {
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case PERF_REG_ARM64_X0:
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return "x0";
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case PERF_REG_ARM64_X1:
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return "x1";
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case PERF_REG_ARM64_X2:
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return "x2";
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case PERF_REG_ARM64_X3:
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return "x3";
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case PERF_REG_ARM64_X4:
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return "x4";
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case PERF_REG_ARM64_X5:
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return "x5";
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case PERF_REG_ARM64_X6:
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return "x6";
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case PERF_REG_ARM64_X7:
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return "x7";
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case PERF_REG_ARM64_X8:
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return "x8";
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case PERF_REG_ARM64_X9:
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return "x9";
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case PERF_REG_ARM64_X10:
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return "x10";
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case PERF_REG_ARM64_X11:
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return "x11";
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case PERF_REG_ARM64_X12:
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return "x12";
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case PERF_REG_ARM64_X13:
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return "x13";
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case PERF_REG_ARM64_X14:
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return "x14";
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case PERF_REG_ARM64_X15:
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return "x15";
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case PERF_REG_ARM64_X16:
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return "x16";
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case PERF_REG_ARM64_X17:
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return "x17";
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case PERF_REG_ARM64_X18:
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return "x18";
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case PERF_REG_ARM64_X19:
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return "x19";
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case PERF_REG_ARM64_X20:
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return "x20";
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case PERF_REG_ARM64_X21:
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return "x21";
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case PERF_REG_ARM64_X22:
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return "x22";
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case PERF_REG_ARM64_X23:
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return "x23";
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case PERF_REG_ARM64_X24:
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return "x24";
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case PERF_REG_ARM64_X25:
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return "x25";
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case PERF_REG_ARM64_X26:
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return "x26";
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case PERF_REG_ARM64_X27:
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return "x27";
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case PERF_REG_ARM64_X28:
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return "x28";
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case PERF_REG_ARM64_X29:
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return "x29";
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case PERF_REG_ARM64_SP:
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return "sp";
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case PERF_REG_ARM64_LR:
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return "lr";
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case PERF_REG_ARM64_PC:
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return "pc";
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case PERF_REG_ARM64_VG:
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return "vg";
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default:
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return NULL;
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}
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return NULL;
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}
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static const char *__perf_reg_name_arm(int id)
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{
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switch (id) {
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case PERF_REG_ARM_R0:
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return "r0";
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case PERF_REG_ARM_R1:
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return "r1";
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case PERF_REG_ARM_R2:
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return "r2";
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case PERF_REG_ARM_R3:
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return "r3";
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case PERF_REG_ARM_R4:
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return "r4";
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case PERF_REG_ARM_R5:
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return "r5";
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case PERF_REG_ARM_R6:
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return "r6";
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case PERF_REG_ARM_R7:
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return "r7";
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case PERF_REG_ARM_R8:
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return "r8";
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case PERF_REG_ARM_R9:
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return "r9";
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case PERF_REG_ARM_R10:
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return "r10";
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case PERF_REG_ARM_FP:
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return "fp";
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case PERF_REG_ARM_IP:
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return "ip";
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case PERF_REG_ARM_SP:
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return "sp";
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case PERF_REG_ARM_LR:
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return "lr";
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case PERF_REG_ARM_PC:
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return "pc";
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default:
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return NULL;
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}
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return NULL;
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}
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static const char *__perf_reg_name_csky(int id)
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{
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switch (id) {
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case PERF_REG_CSKY_A0:
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return "a0";
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case PERF_REG_CSKY_A1:
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return "a1";
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case PERF_REG_CSKY_A2:
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return "a2";
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case PERF_REG_CSKY_A3:
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return "a3";
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case PERF_REG_CSKY_REGS0:
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return "regs0";
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case PERF_REG_CSKY_REGS1:
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return "regs1";
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case PERF_REG_CSKY_REGS2:
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return "regs2";
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case PERF_REG_CSKY_REGS3:
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return "regs3";
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case PERF_REG_CSKY_REGS4:
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return "regs4";
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case PERF_REG_CSKY_REGS5:
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return "regs5";
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case PERF_REG_CSKY_REGS6:
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return "regs6";
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case PERF_REG_CSKY_REGS7:
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return "regs7";
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case PERF_REG_CSKY_REGS8:
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return "regs8";
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case PERF_REG_CSKY_REGS9:
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return "regs9";
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case PERF_REG_CSKY_SP:
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return "sp";
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case PERF_REG_CSKY_LR:
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return "lr";
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case PERF_REG_CSKY_PC:
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return "pc";
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#if defined(__CSKYABIV2__)
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case PERF_REG_CSKY_EXREGS0:
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return "exregs0";
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case PERF_REG_CSKY_EXREGS1:
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return "exregs1";
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case PERF_REG_CSKY_EXREGS2:
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return "exregs2";
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case PERF_REG_CSKY_EXREGS3:
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return "exregs3";
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case PERF_REG_CSKY_EXREGS4:
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return "exregs4";
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case PERF_REG_CSKY_EXREGS5:
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return "exregs5";
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case PERF_REG_CSKY_EXREGS6:
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return "exregs6";
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case PERF_REG_CSKY_EXREGS7:
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return "exregs7";
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case PERF_REG_CSKY_EXREGS8:
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return "exregs8";
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case PERF_REG_CSKY_EXREGS9:
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return "exregs9";
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case PERF_REG_CSKY_EXREGS10:
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return "exregs10";
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case PERF_REG_CSKY_EXREGS11:
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return "exregs11";
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case PERF_REG_CSKY_EXREGS12:
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return "exregs12";
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case PERF_REG_CSKY_EXREGS13:
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return "exregs13";
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case PERF_REG_CSKY_EXREGS14:
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return "exregs14";
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case PERF_REG_CSKY_TLS:
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return "tls";
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case PERF_REG_CSKY_HI:
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return "hi";
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case PERF_REG_CSKY_LO:
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return "lo";
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#endif
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default:
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return NULL;
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}
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return NULL;
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}
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static const char *__perf_reg_name_mips(int id)
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{
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switch (id) {
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case PERF_REG_MIPS_PC:
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return "PC";
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case PERF_REG_MIPS_R1:
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return "$1";
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case PERF_REG_MIPS_R2:
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return "$2";
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case PERF_REG_MIPS_R3:
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return "$3";
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case PERF_REG_MIPS_R4:
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return "$4";
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case PERF_REG_MIPS_R5:
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return "$5";
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case PERF_REG_MIPS_R6:
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return "$6";
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case PERF_REG_MIPS_R7:
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return "$7";
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case PERF_REG_MIPS_R8:
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return "$8";
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case PERF_REG_MIPS_R9:
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return "$9";
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case PERF_REG_MIPS_R10:
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return "$10";
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case PERF_REG_MIPS_R11:
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return "$11";
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case PERF_REG_MIPS_R12:
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return "$12";
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case PERF_REG_MIPS_R13:
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return "$13";
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case PERF_REG_MIPS_R14:
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return "$14";
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case PERF_REG_MIPS_R15:
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return "$15";
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case PERF_REG_MIPS_R16:
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return "$16";
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case PERF_REG_MIPS_R17:
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return "$17";
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case PERF_REG_MIPS_R18:
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return "$18";
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case PERF_REG_MIPS_R19:
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return "$19";
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case PERF_REG_MIPS_R20:
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return "$20";
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case PERF_REG_MIPS_R21:
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return "$21";
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case PERF_REG_MIPS_R22:
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return "$22";
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case PERF_REG_MIPS_R23:
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return "$23";
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case PERF_REG_MIPS_R24:
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return "$24";
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case PERF_REG_MIPS_R25:
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return "$25";
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case PERF_REG_MIPS_R28:
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return "$28";
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case PERF_REG_MIPS_R29:
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return "$29";
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case PERF_REG_MIPS_R30:
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return "$30";
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case PERF_REG_MIPS_R31:
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return "$31";
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default:
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break;
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}
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return NULL;
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}
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static const char *__perf_reg_name_powerpc(int id)
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{
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switch (id) {
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case PERF_REG_POWERPC_R0:
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return "r0";
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case PERF_REG_POWERPC_R1:
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return "r1";
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case PERF_REG_POWERPC_R2:
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return "r2";
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case PERF_REG_POWERPC_R3:
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return "r3";
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case PERF_REG_POWERPC_R4:
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return "r4";
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case PERF_REG_POWERPC_R5:
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return "r5";
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case PERF_REG_POWERPC_R6:
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return "r6";
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case PERF_REG_POWERPC_R7:
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return "r7";
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case PERF_REG_POWERPC_R8:
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return "r8";
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case PERF_REG_POWERPC_R9:
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return "r9";
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case PERF_REG_POWERPC_R10:
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return "r10";
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case PERF_REG_POWERPC_R11:
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return "r11";
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case PERF_REG_POWERPC_R12:
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return "r12";
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case PERF_REG_POWERPC_R13:
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return "r13";
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case PERF_REG_POWERPC_R14:
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return "r14";
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case PERF_REG_POWERPC_R15:
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return "r15";
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case PERF_REG_POWERPC_R16:
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return "r16";
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case PERF_REG_POWERPC_R17:
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return "r17";
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case PERF_REG_POWERPC_R18:
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return "r18";
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case PERF_REG_POWERPC_R19:
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return "r19";
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case PERF_REG_POWERPC_R20:
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return "r20";
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case PERF_REG_POWERPC_R21:
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return "r21";
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case PERF_REG_POWERPC_R22:
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return "r22";
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case PERF_REG_POWERPC_R23:
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return "r23";
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case PERF_REG_POWERPC_R24:
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return "r24";
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case PERF_REG_POWERPC_R25:
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return "r25";
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case PERF_REG_POWERPC_R26:
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return "r26";
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case PERF_REG_POWERPC_R27:
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return "r27";
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case PERF_REG_POWERPC_R28:
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return "r28";
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case PERF_REG_POWERPC_R29:
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return "r29";
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case PERF_REG_POWERPC_R30:
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return "r30";
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case PERF_REG_POWERPC_R31:
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return "r31";
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case PERF_REG_POWERPC_NIP:
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return "nip";
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case PERF_REG_POWERPC_MSR:
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return "msr";
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case PERF_REG_POWERPC_ORIG_R3:
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return "orig_r3";
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case PERF_REG_POWERPC_CTR:
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return "ctr";
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case PERF_REG_POWERPC_LINK:
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return "link";
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case PERF_REG_POWERPC_XER:
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return "xer";
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case PERF_REG_POWERPC_CCR:
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return "ccr";
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case PERF_REG_POWERPC_SOFTE:
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return "softe";
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case PERF_REG_POWERPC_TRAP:
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return "trap";
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case PERF_REG_POWERPC_DAR:
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return "dar";
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case PERF_REG_POWERPC_DSISR:
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return "dsisr";
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case PERF_REG_POWERPC_SIER:
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return "sier";
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case PERF_REG_POWERPC_MMCRA:
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return "mmcra";
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case PERF_REG_POWERPC_MMCR0:
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return "mmcr0";
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case PERF_REG_POWERPC_MMCR1:
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return "mmcr1";
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case PERF_REG_POWERPC_MMCR2:
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return "mmcr2";
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case PERF_REG_POWERPC_MMCR3:
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return "mmcr3";
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case PERF_REG_POWERPC_SIER2:
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return "sier2";
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case PERF_REG_POWERPC_SIER3:
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return "sier3";
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case PERF_REG_POWERPC_PMC1:
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return "pmc1";
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case PERF_REG_POWERPC_PMC2:
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return "pmc2";
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case PERF_REG_POWERPC_PMC3:
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return "pmc3";
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case PERF_REG_POWERPC_PMC4:
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return "pmc4";
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case PERF_REG_POWERPC_PMC5:
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return "pmc5";
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case PERF_REG_POWERPC_PMC6:
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return "pmc6";
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case PERF_REG_POWERPC_SDAR:
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return "sdar";
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case PERF_REG_POWERPC_SIAR:
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return "siar";
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default:
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break;
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}
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return NULL;
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}
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static const char *__perf_reg_name_riscv(int id)
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{
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switch (id) {
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case PERF_REG_RISCV_PC:
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return "pc";
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case PERF_REG_RISCV_RA:
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return "ra";
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case PERF_REG_RISCV_SP:
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return "sp";
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case PERF_REG_RISCV_GP:
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return "gp";
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case PERF_REG_RISCV_TP:
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return "tp";
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case PERF_REG_RISCV_T0:
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return "t0";
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case PERF_REG_RISCV_T1:
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return "t1";
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case PERF_REG_RISCV_T2:
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return "t2";
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case PERF_REG_RISCV_S0:
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return "s0";
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case PERF_REG_RISCV_S1:
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return "s1";
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case PERF_REG_RISCV_A0:
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return "a0";
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case PERF_REG_RISCV_A1:
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return "a1";
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case PERF_REG_RISCV_A2:
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return "a2";
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case PERF_REG_RISCV_A3:
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return "a3";
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case PERF_REG_RISCV_A4:
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return "a4";
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case PERF_REG_RISCV_A5:
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return "a5";
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case PERF_REG_RISCV_A6:
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return "a6";
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case PERF_REG_RISCV_A7:
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return "a7";
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case PERF_REG_RISCV_S2:
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return "s2";
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case PERF_REG_RISCV_S3:
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return "s3";
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case PERF_REG_RISCV_S4:
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return "s4";
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case PERF_REG_RISCV_S5:
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return "s5";
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case PERF_REG_RISCV_S6:
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return "s6";
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case PERF_REG_RISCV_S7:
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return "s7";
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case PERF_REG_RISCV_S8:
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return "s8";
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case PERF_REG_RISCV_S9:
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return "s9";
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case PERF_REG_RISCV_S10:
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return "s10";
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case PERF_REG_RISCV_S11:
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return "s11";
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case PERF_REG_RISCV_T3:
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return "t3";
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case PERF_REG_RISCV_T4:
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return "t4";
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case PERF_REG_RISCV_T5:
|
|
return "t5";
|
|
case PERF_REG_RISCV_T6:
|
|
return "t6";
|
|
default:
|
|
return NULL;
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
static const char *__perf_reg_name_s390(int id)
|
|
{
|
|
switch (id) {
|
|
case PERF_REG_S390_R0:
|
|
return "R0";
|
|
case PERF_REG_S390_R1:
|
|
return "R1";
|
|
case PERF_REG_S390_R2:
|
|
return "R2";
|
|
case PERF_REG_S390_R3:
|
|
return "R3";
|
|
case PERF_REG_S390_R4:
|
|
return "R4";
|
|
case PERF_REG_S390_R5:
|
|
return "R5";
|
|
case PERF_REG_S390_R6:
|
|
return "R6";
|
|
case PERF_REG_S390_R7:
|
|
return "R7";
|
|
case PERF_REG_S390_R8:
|
|
return "R8";
|
|
case PERF_REG_S390_R9:
|
|
return "R9";
|
|
case PERF_REG_S390_R10:
|
|
return "R10";
|
|
case PERF_REG_S390_R11:
|
|
return "R11";
|
|
case PERF_REG_S390_R12:
|
|
return "R12";
|
|
case PERF_REG_S390_R13:
|
|
return "R13";
|
|
case PERF_REG_S390_R14:
|
|
return "R14";
|
|
case PERF_REG_S390_R15:
|
|
return "R15";
|
|
case PERF_REG_S390_FP0:
|
|
return "FP0";
|
|
case PERF_REG_S390_FP1:
|
|
return "FP1";
|
|
case PERF_REG_S390_FP2:
|
|
return "FP2";
|
|
case PERF_REG_S390_FP3:
|
|
return "FP3";
|
|
case PERF_REG_S390_FP4:
|
|
return "FP4";
|
|
case PERF_REG_S390_FP5:
|
|
return "FP5";
|
|
case PERF_REG_S390_FP6:
|
|
return "FP6";
|
|
case PERF_REG_S390_FP7:
|
|
return "FP7";
|
|
case PERF_REG_S390_FP8:
|
|
return "FP8";
|
|
case PERF_REG_S390_FP9:
|
|
return "FP9";
|
|
case PERF_REG_S390_FP10:
|
|
return "FP10";
|
|
case PERF_REG_S390_FP11:
|
|
return "FP11";
|
|
case PERF_REG_S390_FP12:
|
|
return "FP12";
|
|
case PERF_REG_S390_FP13:
|
|
return "FP13";
|
|
case PERF_REG_S390_FP14:
|
|
return "FP14";
|
|
case PERF_REG_S390_FP15:
|
|
return "FP15";
|
|
case PERF_REG_S390_MASK:
|
|
return "MASK";
|
|
case PERF_REG_S390_PC:
|
|
return "PC";
|
|
default:
|
|
return NULL;
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
static const char *__perf_reg_name_x86(int id)
|
|
{
|
|
switch (id) {
|
|
case PERF_REG_X86_AX:
|
|
return "AX";
|
|
case PERF_REG_X86_BX:
|
|
return "BX";
|
|
case PERF_REG_X86_CX:
|
|
return "CX";
|
|
case PERF_REG_X86_DX:
|
|
return "DX";
|
|
case PERF_REG_X86_SI:
|
|
return "SI";
|
|
case PERF_REG_X86_DI:
|
|
return "DI";
|
|
case PERF_REG_X86_BP:
|
|
return "BP";
|
|
case PERF_REG_X86_SP:
|
|
return "SP";
|
|
case PERF_REG_X86_IP:
|
|
return "IP";
|
|
case PERF_REG_X86_FLAGS:
|
|
return "FLAGS";
|
|
case PERF_REG_X86_CS:
|
|
return "CS";
|
|
case PERF_REG_X86_SS:
|
|
return "SS";
|
|
case PERF_REG_X86_DS:
|
|
return "DS";
|
|
case PERF_REG_X86_ES:
|
|
return "ES";
|
|
case PERF_REG_X86_FS:
|
|
return "FS";
|
|
case PERF_REG_X86_GS:
|
|
return "GS";
|
|
case PERF_REG_X86_R8:
|
|
return "R8";
|
|
case PERF_REG_X86_R9:
|
|
return "R9";
|
|
case PERF_REG_X86_R10:
|
|
return "R10";
|
|
case PERF_REG_X86_R11:
|
|
return "R11";
|
|
case PERF_REG_X86_R12:
|
|
return "R12";
|
|
case PERF_REG_X86_R13:
|
|
return "R13";
|
|
case PERF_REG_X86_R14:
|
|
return "R14";
|
|
case PERF_REG_X86_R15:
|
|
return "R15";
|
|
|
|
#define XMM(x) \
|
|
case PERF_REG_X86_XMM ## x: \
|
|
case PERF_REG_X86_XMM ## x + 1: \
|
|
return "XMM" #x;
|
|
XMM(0)
|
|
XMM(1)
|
|
XMM(2)
|
|
XMM(3)
|
|
XMM(4)
|
|
XMM(5)
|
|
XMM(6)
|
|
XMM(7)
|
|
XMM(8)
|
|
XMM(9)
|
|
XMM(10)
|
|
XMM(11)
|
|
XMM(12)
|
|
XMM(13)
|
|
XMM(14)
|
|
XMM(15)
|
|
#undef XMM
|
|
default:
|
|
return NULL;
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
const char *perf_reg_name(int id, const char *arch)
|
|
{
|
|
const char *reg_name = NULL;
|
|
|
|
if (!strcmp(arch, "csky"))
|
|
reg_name = __perf_reg_name_csky(id);
|
|
else if (!strcmp(arch, "mips"))
|
|
reg_name = __perf_reg_name_mips(id);
|
|
else if (!strcmp(arch, "powerpc"))
|
|
reg_name = __perf_reg_name_powerpc(id);
|
|
else if (!strcmp(arch, "riscv"))
|
|
reg_name = __perf_reg_name_riscv(id);
|
|
else if (!strcmp(arch, "s390"))
|
|
reg_name = __perf_reg_name_s390(id);
|
|
else if (!strcmp(arch, "x86"))
|
|
reg_name = __perf_reg_name_x86(id);
|
|
else if (!strcmp(arch, "arm"))
|
|
reg_name = __perf_reg_name_arm(id);
|
|
else if (!strcmp(arch, "arm64"))
|
|
reg_name = __perf_reg_name_arm64(id);
|
|
|
|
return reg_name ?: "unknown";
|
|
}
|
|
|
|
int perf_reg_value(u64 *valp, struct regs_dump *regs, int id)
|
|
{
|
|
int i, idx = 0;
|
|
u64 mask = regs->mask;
|
|
|
|
if ((u64)id >= PERF_SAMPLE_REGS_CACHE_SIZE)
|
|
return -EINVAL;
|
|
|
|
if (regs->cache_mask & (1ULL << id))
|
|
goto out;
|
|
|
|
if (!(mask & (1ULL << id)))
|
|
return -EINVAL;
|
|
|
|
for (i = 0; i < id; i++) {
|
|
if (mask & (1ULL << i))
|
|
idx++;
|
|
}
|
|
|
|
regs->cache_mask |= (1ULL << id);
|
|
regs->cache_regs[id] = regs->regs[idx];
|
|
|
|
out:
|
|
*valp = regs->cache_regs[id];
|
|
return 0;
|
|
}
|
|
#endif
|