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8efcf34a26
This is a branch with a few merge requests that either came in late, or took a while longer for us to review and merge than usual and thus cut it a bit close to the merge window. We stage them in a separate branch and if things look good, we still send them up -- and that's the case here. This is mostly DT additions for Renesas platforms, adding IP block descriptions for existing and new SoCs. There are also some driver updates for Qualcomm platforms for SMEM/QMI and GENI, which is their generalized serial protocol interface. -----BEGIN PGP SIGNATURE----- iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlsfCVIPHG9sb2ZAbGl4 b20ubmV0AAoJEIwa5zzehBx3KOcP/3O2+igstXt5rhemITdyi8rHkrIHPgetf25e ISBQzYrQOHV21SqT4le/Gk2CCQ6iX5Nv2DYoIrCzFWi/4DoDxXvryczQLla02Nru i8fcuxae7aFGW7/97G1+cATGPwuBLPiKXs6Wj01sKHeLBja5Det7eoXuHag7Y/Lo 4ls9wNZybMdlCcGm6+ULdj+XUdRyYUhOQQYvnPm2Q8hEkM+AiwLOBJTFwef9P5ad mX37kPDfwCxYwQXgZB1RkK/oJu0G2mTZXmGH5o+s+9yAyAupCQhmHGOrt3mlOf7j tLRlSgarJlO/QGIpJmDuCcxt3msD3OMd2dPbdgwojdpvycOU8EVWYLmCRpyIWQXv DCv9A9Gp4KlJnwxheVegBtilRA1aKsGuarWq6yeyOFt8N23Bgg/IjYKI9JF5+hPD M4q1oVAbUlfWb79rEc+TB0d7euREBkNn4TzzKMSOyP3eGUrXR0WUlq2A2VLxgIJo cx/ufY7CwvRgV+VxfhRbca+FmwDnu7uqzwLe73Ys2hnsuv8hXEtc+vSybqKqxVeU nHpWAqwaWhijlJiGq722vPo8avrLwjsxRwimogvijtesz9ZlTqrGtjkg61+eN2h8 eeuyRAsMUfVRiKuL3W+q4s0rzIauormnKsvRScKVyNFuiJfrfYb1odLoDGaOV/9G dQ7hA7TW =RUL0 -----END PGP SIGNATURE----- Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late updates from Olof Johansson: "This is a branch with a few merge requests that either came in late, or took a while longer for us to review and merge than usual and thus cut it a bit close to the merge window. We stage them in a separate branch and if things look good, we still send them up -- and that's the case here. This is mostly DT additions for Renesas platforms, adding IP block descriptions for existing and new SoCs. There are also some driver updates for Qualcomm platforms for SMEM/QMI and GENI, which is their generalized serial protocol interface" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (186 commits) soc: qcom: smem: introduce qcom_smem_virt_to_phys() soc: qcom: qmi: fix a buffer sizing bug MAINTAINERS: Update pattern for qcom_scm soc: Unconditionally include qcom Makefile soc: qcom: smem: check sooner in qcom_smem_set_global_partition() soc: qcom: smem: fix qcom_smem_set_global_partition() soc: qcom: smem: fix off-by-one error in qcom_smem_alloc_private() soc: qcom: smem: byte swap values properly soc: qcom: smem: return proper type for cached entry functions soc: qcom: smem: fix first cache entry calculation soc: qcom: cmd-db: Make endian-agnostic drivers: qcom: add command DB driver arm64: dts: renesas: salvator-common: Add ADV7482 support ARM: dts: r8a7740: Add CEU1 ARM: dts: r8a7740: Add CEU0 arm64: dts: renesas: salvator-common: enable VIN arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes arm64: dts: renesas: r8a7795-es1: add CSI-2 node ...
937 lines
16 KiB
Plaintext
937 lines
16 KiB
Plaintext
/*
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* Device Tree Source for the Lager board
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*
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* Copyright (C) 2013-2014 Renesas Solutions Corp.
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* Copyright (C) 2014 Cogent Embedded, Inc.
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* Copyright (C) 2015-2016 Renesas Electronics Corporation
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/*
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* SSI-AK4643
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*
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* SW1: 1: AK4643
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* 2: CN22
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* 3: ADV7511
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*
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* This command is required when Playback/Capture
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*
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* amixer set "LINEOUT Mixer DACL" on
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* amixer set "DVC Out" 100%
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* amixer set "DVC In" 100%
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*
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* You can use Mute
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*
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* amixer set "DVC Out Mute" on
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* amixer set "DVC In Mute" on
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*
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* You can use Volume Ramp
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*
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* amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
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* amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
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* amixer set "DVC Out Ramp" on
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* aplay xxx.wav &
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* amixer set "DVC Out" 80% // Volume Down
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* amixer set "DVC Out" 100% // Volume Up
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*/
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/dts-v1/;
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#include "r8a7790.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Lager";
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compatible = "renesas,lager", "renesas,r8a7790";
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aliases {
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serial0 = &scif0;
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serial1 = &scifa1;
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i2c8 = &gpioi2c1;
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i2c9 = &gpioi2c2;
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i2c10 = &i2cexio0;
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i2c11 = &i2cexio1;
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i2c12 = &i2chdmi;
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i2c13 = &i2cpwr;
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};
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chosen {
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
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stdout-path = "serial0:115200n8";
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x40000000>;
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};
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memory@140000000 {
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device_type = "memory";
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reg = <1 0x40000000 0 0xc0000000>;
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};
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lbsc {
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#address-cells = <1>;
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#size-cells = <1>;
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};
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keyboard {
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compatible = "gpio-keys";
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one {
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linux,code = <KEY_1>;
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label = "SW2-1";
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wakeup-source;
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debounce-interval = <20>;
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gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
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};
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two {
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linux,code = <KEY_2>;
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label = "SW2-2";
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wakeup-source;
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debounce-interval = <20>;
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gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
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};
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three {
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linux,code = <KEY_3>;
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label = "SW2-3";
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wakeup-source;
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debounce-interval = <20>;
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gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
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};
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four {
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linux,code = <KEY_4>;
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label = "SW2-4";
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wakeup-source;
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debounce-interval = <20>;
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gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led6 {
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gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
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};
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led7 {
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gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
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};
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led8 {
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gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
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};
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};
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fixedregulator3v3: regulator-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vcc_sdhi0: regulator-vcc-sdhi0 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI0 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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vccq_sdhi0: regulator-vccq-sdhi0 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI0 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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};
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vcc_sdhi2: regulator-vcc-sdhi2 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI2 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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vccq_sdhi2: regulator-vccq-sdhi2 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI2 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1
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1800000 0>;
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};
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audio_clock: audio_clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <11289600>;
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};
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rsnd_ak4643: sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "left_j";
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simple-audio-card,bitclock-master = <&sndcodec>;
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simple-audio-card,frame-master = <&sndcodec>;
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sndcpu: simple-audio-card,cpu {
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sound-dai = <&rcar_sound>;
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};
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sndcodec: simple-audio-card,codec {
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sound-dai = <&ak4643>;
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clocks = <&audio_clock>;
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};
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};
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vga-encoder {
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compatible = "adi,adv7123";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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adv7123_in: endpoint {
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remote-endpoint = <&du_out_rgb>;
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};
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};
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port@1 {
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reg = <1>;
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adv7123_out: endpoint {
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remote-endpoint = <&vga_in>;
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};
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};
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};
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};
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vga {
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compatible = "vga-connector";
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port {
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vga_in: endpoint {
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remote-endpoint = <&adv7123_out>;
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};
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};
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};
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hdmi-in {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con_in: endpoint {
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remote-endpoint = <&adv7612_in>;
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};
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};
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};
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cec_clock: cec-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <12000000>;
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};
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hdmi-out {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con_out: endpoint {
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remote-endpoint = <&adv7511_out>;
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};
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};
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};
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x2_clk: x2-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <148500000>;
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};
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x13_clk: x13-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <148500000>;
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};
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gpioi2c1: i2c-8 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "i2c-gpio";
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status = "disabled";
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scl-gpios = <&gpio1 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio1 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <5>;
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};
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gpioi2c2: i2c-9 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "i2c-gpio";
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status = "disabled";
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scl-gpios = <&gpio5 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio5 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <5>;
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};
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/*
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* IIC0/I2C0 is routed to EXIO connector A, pins 114 (SCL) + 116 (SDA) only.
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* We use the I2C demuxer, so the desired IP core can be selected at runtime
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* depending on the use case (e.g. DMA with IIC0 or slave support with I2C0).
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* Note: For testing the I2C slave feature, it is convenient to connect this
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* bus with IIC3 on pins 110 (SCL) + 112 (SDA), select I2C0 at runtime, and
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* instantiate the slave device at runtime according to the documentation.
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* You can then communicate with the slave via IIC3.
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*
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* IIC0/I2C0 does not appear to support fallback to GPIO.
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*/
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i2cexio0: i2c-10 {
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compatible = "i2c-demux-pinctrl";
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i2c-parent = <&iic0>, <&i2c0>;
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i2c-bus-name = "i2c-exio0";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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/*
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* IIC1/I2C1 is routed to EXIO connector A, pins 78 (SCL) + 80 (SDA).
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* This is similar to the arangement described for i2cexio0 (above)
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* with a fallback to GPIO also provided.
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*/
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i2cexio1: i2c-11 {
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compatible = "i2c-demux-pinctrl";
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i2c-parent = <&iic1>, <&i2c1>, <&gpioi2c1>;
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i2c-bus-name = "i2c-exio1";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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/*
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* IIC2 and I2C2 may be switched using pinmux.
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* A fallback to GPIO is also provided.
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*/
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i2chdmi: i2c-12 {
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compatible = "i2c-demux-pinctrl";
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i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>;
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i2c-bus-name = "i2c-hdmi";
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#address-cells = <1>;
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#size-cells = <0>;
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ak4643: codec@12 {
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compatible = "asahi-kasei,ak4643";
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#sound-dai-cells = <0>;
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reg = <0x12>;
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};
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composite-in@20 {
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compatible = "adi,adv7180";
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reg = <0x20>;
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remote = <&vin1>;
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port {
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adv7180: endpoint {
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bus-width = <8>;
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remote-endpoint = <&vin1ep0>;
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};
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};
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};
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hdmi@39 {
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compatible = "adi,adv7511w";
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reg = <0x39>;
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interrupt-parent = <&gpio1>;
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interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&cec_clock>;
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clock-names = "cec";
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adi,input-depth = <8>;
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adi,input-colorspace = "rgb";
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adi,input-clock = "1x";
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adi,input-style = <1>;
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adi,input-justification = "evenly";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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adv7511_in: endpoint {
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remote-endpoint = <&lvds0_out>;
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};
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};
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port@1 {
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reg = <1>;
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adv7511_out: endpoint {
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remote-endpoint = <&hdmi_con_out>;
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};
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};
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};
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};
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hdmi-in@4c {
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compatible = "adi,adv7612";
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reg = <0x4c>;
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interrupt-parent = <&gpio1>;
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interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
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default-input = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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adv7612_in: endpoint {
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remote-endpoint = <&hdmi_con_in>;
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};
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};
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port@2 {
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reg = <2>;
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adv7612_out: endpoint {
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remote-endpoint = <&vin0ep2>;
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};
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};
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};
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};
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};
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/*
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* IIC3 and I2C3 may be switched using pinmux.
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* IIC3/I2C3 does not appear to support fallback to GPIO.
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*/
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i2cpwr: i2c-13 {
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compatible = "i2c-demux-pinctrl";
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i2c-parent = <&iic3>, <&i2c3>;
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i2c-bus-name = "i2c-pwr";
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#address-cells = <1>;
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#size-cells = <0>;
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pmic@58 {
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compatible = "dlg,da9063";
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reg = <0x58>;
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interrupt-parent = <&irqc0>;
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interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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rtc {
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compatible = "dlg,da9063-rtc";
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};
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wdt {
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compatible = "dlg,da9063-watchdog";
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};
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};
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vdd_dvfs: regulator@68 {
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compatible = "dlg,da9210";
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reg = <0x68>;
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interrupt-parent = <&irqc0>;
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interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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|
&du {
|
|
pinctrl-0 = <&du_pins>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
|
|
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>,
|
|
<&x13_clk>, <&x2_clk>;
|
|
clock-names = "du.0", "du.1", "du.2", "dclkin.0", "dclkin.1";
|
|
|
|
ports {
|
|
port@0 {
|
|
endpoint {
|
|
remote-endpoint = <&adv7123_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&lvds0 {
|
|
status = "okay";
|
|
|
|
ports {
|
|
port@1 {
|
|
endpoint {
|
|
remote-endpoint = <&adv7511_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&lvds1 {
|
|
status = "okay";
|
|
|
|
ports {
|
|
port@1 {
|
|
lvds_connector: endpoint {
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&extal_clk {
|
|
clock-frequency = <20000000>;
|
|
};
|
|
|
|
&pfc {
|
|
pinctrl-0 = <&scif_clk_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
du_pins: du {
|
|
groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
|
|
function = "du";
|
|
};
|
|
|
|
scif0_pins: scif0 {
|
|
groups = "scif0_data";
|
|
function = "scif0";
|
|
};
|
|
|
|
scif_clk_pins: scif_clk {
|
|
groups = "scif_clk";
|
|
function = "scif_clk";
|
|
};
|
|
|
|
ether_pins: ether {
|
|
groups = "eth_link", "eth_mdio", "eth_rmii";
|
|
function = "eth";
|
|
};
|
|
|
|
phy1_pins: phy1 {
|
|
groups = "intc_irq0";
|
|
function = "intc";
|
|
};
|
|
|
|
scifa1_pins: scifa1 {
|
|
groups = "scifa1_data";
|
|
function = "scifa1";
|
|
};
|
|
|
|
sdhi0_pins: sd0 {
|
|
groups = "sdhi0_data4", "sdhi0_ctrl";
|
|
function = "sdhi0";
|
|
power-source = <3300>;
|
|
};
|
|
|
|
sdhi0_pins_uhs: sd0_uhs {
|
|
groups = "sdhi0_data4", "sdhi0_ctrl";
|
|
function = "sdhi0";
|
|
power-source = <1800>;
|
|
};
|
|
|
|
sdhi2_pins: sd2 {
|
|
groups = "sdhi2_data4", "sdhi2_ctrl";
|
|
function = "sdhi2";
|
|
power-source = <3300>;
|
|
};
|
|
|
|
sdhi2_pins_uhs: sd2_uhs {
|
|
groups = "sdhi2_data4", "sdhi2_ctrl";
|
|
function = "sdhi2";
|
|
power-source = <1800>;
|
|
};
|
|
|
|
mmc1_pins: mmc1 {
|
|
groups = "mmc1_data8", "mmc1_ctrl";
|
|
function = "mmc1";
|
|
};
|
|
|
|
qspi_pins: qspi {
|
|
groups = "qspi_ctrl", "qspi_data4";
|
|
function = "qspi";
|
|
};
|
|
|
|
msiof1_pins: msiof1 {
|
|
groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
|
|
"msiof1_tx";
|
|
function = "msiof1";
|
|
};
|
|
|
|
i2c0_pins: i2c0 {
|
|
groups = "i2c0";
|
|
function = "i2c0";
|
|
};
|
|
|
|
iic0_pins: iic0 {
|
|
groups = "iic0";
|
|
function = "iic0";
|
|
};
|
|
|
|
i2c1_pins: i2c1 {
|
|
groups = "i2c1";
|
|
function = "i2c1";
|
|
};
|
|
|
|
iic1_pins: iic1 {
|
|
groups = "iic1";
|
|
function = "iic1";
|
|
};
|
|
|
|
i2c2_pins: i2c2 {
|
|
groups = "i2c2";
|
|
function = "i2c2";
|
|
};
|
|
|
|
iic2_pins: iic2 {
|
|
groups = "iic2";
|
|
function = "iic2";
|
|
};
|
|
|
|
i2c3_pins: i2c3 {
|
|
groups = "i2c3";
|
|
function = "i2c3";
|
|
};
|
|
|
|
iic3_pins: iic3 {
|
|
groups = "iic3";
|
|
function = "iic3";
|
|
};
|
|
|
|
hsusb_pins: hsusb {
|
|
groups = "usb0_ovc_vbus";
|
|
function = "usb0";
|
|
};
|
|
|
|
usb0_pins: usb0 {
|
|
groups = "usb0";
|
|
function = "usb0";
|
|
};
|
|
|
|
usb1_pins: usb1 {
|
|
groups = "usb1";
|
|
function = "usb1";
|
|
};
|
|
|
|
usb2_pins: usb2 {
|
|
groups = "usb2";
|
|
function = "usb2";
|
|
};
|
|
|
|
vin0_pins: vin0 {
|
|
groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk";
|
|
function = "vin0";
|
|
};
|
|
|
|
vin1_pins: vin1 {
|
|
groups = "vin1_data8", "vin1_clk";
|
|
function = "vin1";
|
|
};
|
|
|
|
sound_pins: sound {
|
|
groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
|
|
function = "ssi";
|
|
};
|
|
|
|
sound_clk_pins: sound_clk {
|
|
groups = "audio_clk_a";
|
|
function = "audio_clk";
|
|
};
|
|
};
|
|
|
|
ðer {
|
|
pinctrl-0 = <ðer_pins &phy1_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
phy-handle = <&phy1>;
|
|
renesas,ether-link-active-low;
|
|
status = "okay";
|
|
|
|
phy1: ethernet-phy@1 {
|
|
reg = <1>;
|
|
interrupt-parent = <&irqc0>;
|
|
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
|
micrel,led-mode = <1>;
|
|
};
|
|
};
|
|
|
|
&cmt0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&mmcif1 {
|
|
pinctrl-0 = <&mmc1_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
vmmc-supply = <&fixedregulator3v3>;
|
|
bus-width = <8>;
|
|
non-removable;
|
|
status = "okay";
|
|
};
|
|
|
|
&sata1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&qspi {
|
|
pinctrl-0 = <&qspi_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
|
|
flash: flash@0 {
|
|
compatible = "spansion,s25fl512s", "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <30000000>;
|
|
spi-tx-bus-width = <4>;
|
|
spi-rx-bus-width = <4>;
|
|
spi-cpha;
|
|
spi-cpol;
|
|
m25p,fast-read;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "loader";
|
|
reg = <0x00000000 0x00040000>;
|
|
read-only;
|
|
};
|
|
partition@40000 {
|
|
label = "user";
|
|
reg = <0x00040000 0x00400000>;
|
|
read-only;
|
|
};
|
|
partition@440000 {
|
|
label = "flash";
|
|
reg = <0x00440000 0x03bc0000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&scif0 {
|
|
pinctrl-0 = <&scif0_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&scifa1 {
|
|
pinctrl-0 = <&scifa1_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&scif_clk {
|
|
clock-frequency = <14745600>;
|
|
};
|
|
|
|
&msiof1 {
|
|
pinctrl-0 = <&msiof1_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
|
|
pmic: pmic@0 {
|
|
compatible = "renesas,r2a11302ft";
|
|
reg = <0>;
|
|
spi-max-frequency = <6000000>;
|
|
spi-cpol;
|
|
spi-cpha;
|
|
};
|
|
};
|
|
|
|
&sdhi0 {
|
|
pinctrl-0 = <&sdhi0_pins>;
|
|
pinctrl-1 = <&sdhi0_pins_uhs>;
|
|
pinctrl-names = "default", "state_uhs";
|
|
|
|
vmmc-supply = <&vcc_sdhi0>;
|
|
vqmmc-supply = <&vccq_sdhi0>;
|
|
cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
|
|
sd-uhs-sdr50;
|
|
sd-uhs-sdr104;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdhi2 {
|
|
pinctrl-0 = <&sdhi2_pins>;
|
|
pinctrl-1 = <&sdhi2_pins_uhs>;
|
|
pinctrl-names = "default", "state_uhs";
|
|
|
|
vmmc-supply = <&vcc_sdhi2>;
|
|
vqmmc-supply = <&vccq_sdhi2>;
|
|
cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
|
|
sd-uhs-sdr50;
|
|
status = "okay";
|
|
};
|
|
|
|
&cpu0 {
|
|
cpu0-supply = <&vdd_dvfs>;
|
|
};
|
|
|
|
&i2c0 {
|
|
pinctrl-0 = <&i2c0_pins>;
|
|
pinctrl-names = "i2c-exio0";
|
|
};
|
|
|
|
&iic0 {
|
|
pinctrl-0 = <&iic0_pins>;
|
|
pinctrl-names = "i2c-exio0";
|
|
};
|
|
|
|
&i2c1 {
|
|
pinctrl-0 = <&i2c1_pins>;
|
|
pinctrl-names = "i2c-exio1";
|
|
};
|
|
|
|
&iic1 {
|
|
pinctrl-0 = <&iic1_pins>;
|
|
pinctrl-names = "i2c-exio1";
|
|
};
|
|
|
|
&i2c2 {
|
|
pinctrl-0 = <&i2c2_pins>;
|
|
pinctrl-names = "i2c-hdmi";
|
|
|
|
clock-frequency = <100000>;
|
|
};
|
|
|
|
&iic2 {
|
|
pinctrl-0 = <&iic2_pins>;
|
|
pinctrl-names = "i2c-hdmi";
|
|
|
|
clock-frequency = <100000>;
|
|
};
|
|
|
|
&i2c3 {
|
|
pinctrl-0 = <&i2c3_pins>;
|
|
pinctrl-names = "i2c-pwr";
|
|
};
|
|
|
|
&iic3 {
|
|
pinctrl-0 = <&iic3_pins>;
|
|
pinctrl-names = "i2c-pwr";
|
|
};
|
|
|
|
&pci0 {
|
|
status = "okay";
|
|
pinctrl-0 = <&usb0_pins>;
|
|
pinctrl-names = "default";
|
|
};
|
|
|
|
&pci1 {
|
|
status = "okay";
|
|
pinctrl-0 = <&usb1_pins>;
|
|
pinctrl-names = "default";
|
|
};
|
|
|
|
&xhci {
|
|
status = "okay";
|
|
pinctrl-0 = <&usb2_pins>;
|
|
pinctrl-names = "default";
|
|
};
|
|
|
|
&pci2 {
|
|
status = "okay";
|
|
pinctrl-0 = <&usb2_pins>;
|
|
pinctrl-names = "default";
|
|
};
|
|
|
|
&hsusb {
|
|
status = "okay";
|
|
pinctrl-0 = <&hsusb_pins>;
|
|
pinctrl-names = "default";
|
|
renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
&usbphy {
|
|
status = "okay";
|
|
};
|
|
|
|
/* HDMI video input */
|
|
&vin0 {
|
|
pinctrl-0 = <&vin0_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
|
|
port {
|
|
vin0ep2: endpoint {
|
|
remote-endpoint = <&adv7612_out>;
|
|
bus-width = <24>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
pclk-sample = <1>;
|
|
data-active = <1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* composite video input */
|
|
&vin1 {
|
|
pinctrl-0 = <&vin1_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
|
|
port {
|
|
vin1ep0: endpoint {
|
|
remote-endpoint = <&adv7180>;
|
|
bus-width = <8>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&rcar_sound {
|
|
pinctrl-0 = <&sound_pins &sound_clk_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
/* Single DAI */
|
|
#sound-dai-cells = <0>;
|
|
|
|
status = "okay";
|
|
|
|
rcar_sound,dai {
|
|
dai0 {
|
|
playback = <&ssi0 &src2 &dvc0>;
|
|
capture = <&ssi1 &src3 &dvc1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&rwdt {
|
|
timeout-sec = <60>;
|
|
status = "okay";
|
|
};
|
|
|
|
&ssi1 {
|
|
shared-pin;
|
|
};
|