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6bfd1e63de
Currently probe of lpc_sch fails on Intel Poulsbo because of ACPI resource conflicts. A solution is to set the ignore_resource_conflicts flag in the mfd cells. Tested-by: Andreas Werner <andreas.werner@men.de> Signed-off-by: Johannes Thumshirn <johannes.thumshirn@men.de> Signed-off-by: Lee Jones <lee.jones@linaro.org>
182 lines
4.9 KiB
C
182 lines
4.9 KiB
C
/*
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* lpc_sch.c - LPC interface for Intel Poulsbo SCH
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*
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* LPC bridge function of the Intel SCH contains many other
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* functional units, such as Interrupt controllers, Timers,
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* Power Management, System Management, GPIO, RTC, and LPC
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* Configuration Registers.
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*
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* Copyright (c) 2010 CompuLab Ltd
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* Author: Denis Turischev <denis@compulab.co.il>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License 2 as published
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* by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/errno.h>
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#include <linux/acpi.h>
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#include <linux/pci.h>
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#include <linux/mfd/core.h>
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#define SMBASE 0x40
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#define SMBUS_IO_SIZE 64
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#define GPIOBASE 0x44
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#define GPIO_IO_SIZE 64
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#define GPIO_IO_SIZE_CENTERTON 128
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#define WDTBASE 0x84
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#define WDT_IO_SIZE 64
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static struct resource smbus_sch_resource = {
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.flags = IORESOURCE_IO,
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};
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static struct resource gpio_sch_resource = {
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.flags = IORESOURCE_IO,
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};
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static struct resource wdt_sch_resource = {
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.flags = IORESOURCE_IO,
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};
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static struct mfd_cell lpc_sch_cells[3];
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static struct mfd_cell isch_smbus_cell = {
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.name = "isch_smbus",
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.num_resources = 1,
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.resources = &smbus_sch_resource,
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.ignore_resource_conflicts = true,
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};
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static struct mfd_cell sch_gpio_cell = {
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.name = "sch_gpio",
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.num_resources = 1,
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.resources = &gpio_sch_resource,
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.ignore_resource_conflicts = true,
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};
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static struct mfd_cell wdt_sch_cell = {
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.name = "ie6xx_wdt",
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.num_resources = 1,
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.resources = &wdt_sch_resource,
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.ignore_resource_conflicts = true,
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};
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static DEFINE_PCI_DEVICE_TABLE(lpc_sch_ids) = {
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC) },
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC) },
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB) },
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{ 0, }
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};
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MODULE_DEVICE_TABLE(pci, lpc_sch_ids);
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static int lpc_sch_probe(struct pci_dev *dev,
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const struct pci_device_id *id)
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{
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unsigned int base_addr_cfg;
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unsigned short base_addr;
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int i, cells = 0;
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int ret;
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pci_read_config_dword(dev, SMBASE, &base_addr_cfg);
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base_addr = 0;
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if (!(base_addr_cfg & (1 << 31)))
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dev_warn(&dev->dev, "Decode of the SMBus I/O range disabled\n");
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else
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base_addr = (unsigned short)base_addr_cfg;
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if (base_addr == 0) {
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dev_warn(&dev->dev, "I/O space for SMBus uninitialized\n");
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} else {
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lpc_sch_cells[cells++] = isch_smbus_cell;
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smbus_sch_resource.start = base_addr;
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smbus_sch_resource.end = base_addr + SMBUS_IO_SIZE - 1;
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}
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pci_read_config_dword(dev, GPIOBASE, &base_addr_cfg);
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base_addr = 0;
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if (!(base_addr_cfg & (1 << 31)))
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dev_warn(&dev->dev, "Decode of the GPIO I/O range disabled\n");
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else
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base_addr = (unsigned short)base_addr_cfg;
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if (base_addr == 0) {
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dev_warn(&dev->dev, "I/O space for GPIO uninitialized\n");
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} else {
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lpc_sch_cells[cells++] = sch_gpio_cell;
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gpio_sch_resource.start = base_addr;
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if (id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB)
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gpio_sch_resource.end = base_addr + GPIO_IO_SIZE_CENTERTON - 1;
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else
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gpio_sch_resource.end = base_addr + GPIO_IO_SIZE - 1;
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}
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if (id->device == PCI_DEVICE_ID_INTEL_ITC_LPC
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|| id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB) {
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pci_read_config_dword(dev, WDTBASE, &base_addr_cfg);
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base_addr = 0;
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if (!(base_addr_cfg & (1 << 31)))
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dev_warn(&dev->dev, "Decode of the WDT I/O range disabled\n");
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else
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base_addr = (unsigned short)base_addr_cfg;
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if (base_addr == 0)
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dev_warn(&dev->dev, "I/O space for WDT uninitialized\n");
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else {
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lpc_sch_cells[cells++] = wdt_sch_cell;
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wdt_sch_resource.start = base_addr;
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wdt_sch_resource.end = base_addr + WDT_IO_SIZE - 1;
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}
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}
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if (WARN_ON(cells > ARRAY_SIZE(lpc_sch_cells))) {
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dev_err(&dev->dev, "Cell count exceeds array size");
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return -ENODEV;
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}
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if (cells == 0) {
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dev_err(&dev->dev, "All decode registers disabled.\n");
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return -ENODEV;
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}
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for (i = 0; i < cells; i++)
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lpc_sch_cells[i].id = id->device;
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ret = mfd_add_devices(&dev->dev, 0, lpc_sch_cells, cells, NULL, 0, NULL);
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if (ret)
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mfd_remove_devices(&dev->dev);
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return ret;
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}
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static void lpc_sch_remove(struct pci_dev *dev)
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{
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mfd_remove_devices(&dev->dev);
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}
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static struct pci_driver lpc_sch_driver = {
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.name = "lpc_sch",
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.id_table = lpc_sch_ids,
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.probe = lpc_sch_probe,
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.remove = lpc_sch_remove,
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};
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module_pci_driver(lpc_sch_driver);
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MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
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MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH");
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MODULE_LICENSE("GPL");
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