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883a07f69c
Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
470 lines
11 KiB
Plaintext
470 lines
11 KiB
Plaintext
/*
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* at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
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*
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* Copyright (C) 2011 Atmel,
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* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
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* 2012 Joachim Eastwood <manabian@gmail.com>
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*
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* Based on at91sam9260.dtsi
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*
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* Licensed under GPLv2 or later.
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*/
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/include/ "skeleton.dtsi"
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/ {
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model = "Atmel AT91RM9200 family SoC";
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compatible = "atmel,at91rm9200";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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serial4 = &usart3;
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gpio0 = &pioA;
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gpio1 = &pioB;
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gpio2 = &pioC;
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gpio3 = &pioD;
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tcb0 = &tcb0;
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tcb1 = &tcb1;
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ssc0 = &ssc0;
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ssc1 = &ssc1;
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ssc2 = &ssc2;
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};
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cpus {
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cpu@0 {
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compatible = "arm,arm920t";
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};
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};
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memory {
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reg = <0x20000000 0x04000000>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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aic: interrupt-controller@fffff000 {
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#interrupt-cells = <3>;
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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reg = <0xfffff000 0x200>;
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atmel,external-irqs = <25 26 27 28 29 30 31>;
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};
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ramc0: ramc@ffffff00 {
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compatible = "atmel,at91rm9200-sdramc";
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reg = <0xffffff00 0x100>;
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};
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pmc: pmc@fffffc00 {
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compatible = "atmel,at91rm9200-pmc";
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reg = <0xfffffc00 0x100>;
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};
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st: timer@fffffd00 {
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compatible = "atmel,at91rm9200-st";
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reg = <0xfffffd00 0x100>;
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interrupts = <1 4 7>;
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};
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tcb0: timer@fffa0000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfffa0000 0x100>;
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interrupts = <17 4 0 18 4 0 19 4 0>;
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};
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tcb1: timer@fffa4000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfffa4000 0x100>;
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interrupts = <20 4 0 21 4 0 22 4 0>;
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};
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mmc0: mmc@fffb4000 {
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compatible = "atmel,hsmci";
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reg = <0xfffb4000 0x4000>;
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interrupts = <10 4 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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ssc0: ssc@fffd0000 {
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compatible = "atmel,at91rm9200-ssc";
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reg = <0xfffd0000 0x4000>;
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interrupts = <14 4 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
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status = "disable";
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};
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ssc1: ssc@fffd4000 {
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compatible = "atmel,at91rm9200-ssc";
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reg = <0xfffd4000 0x4000>;
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interrupts = <15 4 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
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status = "disable";
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};
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ssc2: ssc@fffd8000 {
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compatible = "atmel,at91rm9200-ssc";
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reg = <0xfffd8000 0x4000>;
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interrupts = <16 4 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
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status = "disable";
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};
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pinctrl@fffff400 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
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ranges = <0xfffff400 0xfffff400 0x800>;
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atmel,mux-mask = <
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/* A B */
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0xffffffff 0xffffffff /* pioA */
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0xffffffff 0x083fffff /* pioB */
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0xffff3fff 0x00000000 /* pioC */
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0x03ff87ff 0x0fffff80 /* pioD */
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>;
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/* shared pinctrl settings */
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dbgu {
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pinctrl_dbgu: dbgu-0 {
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atmel,pins =
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<0 30 0x1 0x0 /* PA30 periph A */
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0 31 0x1 0x1>; /* PA31 periph with pullup */
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};
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};
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uart0 {
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pinctrl_uart0: uart0-0 {
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atmel,pins =
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<0 17 0x1 0x0 /* PA17 periph A */
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0 18 0x1 0x0>; /* PA18 periph A */
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};
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pinctrl_uart0_rts: uart0_rts-0 {
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atmel,pins =
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<0 20 0x1 0x0>; /* PA20 periph A */
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};
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pinctrl_uart0_cts: uart0_cts-0 {
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atmel,pins =
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<0 21 0x1 0x0>; /* PA21 periph A */
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};
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};
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uart1 {
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pinctrl_uart1: uart1-0 {
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atmel,pins =
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<1 20 0x1 0x1 /* PB20 periph A with pullup */
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1 21 0x1 0x0>; /* PB21 periph A */
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};
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pinctrl_uart1_rts: uart1_rts-0 {
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atmel,pins =
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<1 24 0x1 0x0>; /* PB24 periph A */
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};
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pinctrl_uart1_cts: uart1_cts-0 {
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atmel,pins =
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<1 26 0x1 0x0>; /* PB26 periph A */
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};
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pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
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atmel,pins =
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<1 19 0x1 0x0 /* PB19 periph A */
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1 25 0x1 0x0>; /* PB25 periph A */
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};
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pinctrl_uart1_dcd: uart1_dcd-0 {
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atmel,pins =
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<1 23 0x1 0x0>; /* PB23 periph A */
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};
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pinctrl_uart1_ri: uart1_ri-0 {
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atmel,pins =
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<1 18 0x1 0x0>; /* PB18 periph A */
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};
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};
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uart2 {
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pinctrl_uart2: uart2-0 {
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atmel,pins =
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<0 22 0x1 0x0 /* PA22 periph A */
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0 23 0x1 0x1>; /* PA23 periph A with pullup */
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};
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pinctrl_uart2_rts: uart2_rts-0 {
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atmel,pins =
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<0 30 0x2 0x0>; /* PA30 periph B */
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};
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pinctrl_uart2_cts: uart2_cts-0 {
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atmel,pins =
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<0 31 0x2 0x0>; /* PA31 periph B */
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};
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};
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uart3 {
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pinctrl_uart3: uart3-0 {
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atmel,pins =
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<0 5 0x2 0x1 /* PA5 periph B with pullup */
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0 6 0x2 0x0>; /* PA6 periph B */
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};
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pinctrl_uart3_rts: uart3_rts-0 {
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atmel,pins =
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<1 0 0x2 0x0>; /* PB0 periph B */
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};
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pinctrl_uart3_cts: uart3_cts-0 {
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atmel,pins =
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<1 1 0x2 0x0>; /* PB1 periph B */
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};
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};
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nand {
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pinctrl_nand: nand-0 {
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atmel,pins =
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<2 2 0x0 0x1 /* PC2 gpio RDY pin pull_up */
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1 1 0x0 0x1>; /* PB1 gpio CD pin pull_up */
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};
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};
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mmc0 {
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pinctrl_mmc0_clk: mmc0_clk-0 {
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atmel,pins =
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<0 27 0x1 0x0>; /* PA27 periph A */
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};
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pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
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atmel,pins =
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<0 28 0x1 0x1 /* PA28 periph A with pullup */
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0 29 0x1 0x1>; /* PA29 periph A with pullup */
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};
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pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
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atmel,pins =
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<1 3 0x2 0x1 /* PB3 periph B with pullup */
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1 4 0x2 0x1 /* PB4 periph B with pullup */
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1 5 0x2 0x1>; /* PB5 periph B with pullup */
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};
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pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
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atmel,pins =
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<0 8 0x2 0x1 /* PA8 periph B with pullup */
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0 9 0x2 0x1>; /* PA9 periph B with pullup */
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};
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pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
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atmel,pins =
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<0 10 0x2 0x1 /* PA10 periph B with pullup */
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0 11 0x2 0x1 /* PA11 periph B with pullup */
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0 12 0x2 0x1>; /* PA12 periph B with pullup */
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};
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};
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ssc0 {
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pinctrl_ssc0_tx: ssc0_tx-0 {
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atmel,pins =
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<1 0 0x1 0x0 /* PB0 periph A */
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1 1 0x1 0x0 /* PB1 periph A */
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1 2 0x1 0x0>; /* PB2 periph A */
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};
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pinctrl_ssc0_rx: ssc0_rx-0 {
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atmel,pins =
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<1 3 0x1 0x0 /* PB3 periph A */
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1 4 0x1 0x0 /* PB4 periph A */
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1 5 0x1 0x0>; /* PB5 periph A */
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};
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};
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ssc1 {
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pinctrl_ssc1_tx: ssc1_tx-0 {
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atmel,pins =
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<1 6 0x1 0x0 /* PB6 periph A */
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1 7 0x1 0x0 /* PB7 periph A */
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1 8 0x1 0x0>; /* PB8 periph A */
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};
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pinctrl_ssc1_rx: ssc1_rx-0 {
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atmel,pins =
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<1 9 0x1 0x0 /* PB9 periph A */
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1 10 0x1 0x0 /* PB10 periph A */
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1 11 0x1 0x0>; /* PB11 periph A */
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};
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};
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ssc2 {
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pinctrl_ssc2_tx: ssc2_tx-0 {
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atmel,pins =
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<1 12 0x1 0x0 /* PB12 periph A */
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1 13 0x1 0x0 /* PB13 periph A */
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1 14 0x1 0x0>; /* PB14 periph A */
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};
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pinctrl_ssc2_rx: ssc2_rx-0 {
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atmel,pins =
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<1 15 0x1 0x0 /* PB15 periph A */
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1 16 0x1 0x0 /* PB16 periph A */
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1 17 0x1 0x0>; /* PB17 periph A */
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};
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};
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pioA: gpio@fffff400 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff400 0x200>;
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interrupts = <2 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioB: gpio@fffff600 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff600 0x200>;
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interrupts = <3 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioC: gpio@fffff800 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff800 0x200>;
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interrupts = <4 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioD: gpio@fffffa00 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffffa00 0x200>;
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interrupts = <5 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91rm9200-usart";
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reg = <0xfffff200 0x200>;
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interrupts = <1 4 7>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dbgu>;
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status = "disabled";
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};
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usart0: serial@fffc0000 {
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compatible = "atmel,at91rm9200-usart";
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reg = <0xfffc0000 0x200>;
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interrupts = <6 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart0>;
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status = "disabled";
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};
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usart1: serial@fffc4000 {
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compatible = "atmel,at91rm9200-usart";
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reg = <0xfffc4000 0x200>;
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interrupts = <7 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "disabled";
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};
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usart2: serial@fffc8000 {
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compatible = "atmel,at91rm9200-usart";
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reg = <0xfffc8000 0x200>;
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interrupts = <8 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "disabled";
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};
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usart3: serial@fffcc000 {
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compatible = "atmel,at91rm9200-usart";
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reg = <0xfffcc000 0x200>;
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interrupts = <23 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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status = "disabled";
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};
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usb1: gadget@fffb0000 {
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compatible = "atmel,at91rm9200-udc";
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reg = <0xfffb0000 0x4000>;
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interrupts = <11 4 2>;
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status = "disabled";
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};
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};
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nand0: nand@40000000 {
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compatible = "atmel,at91rm9200-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x40000000 0x10000000>;
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atmel,nand-addr-offset = <21>;
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atmel,nand-cmd-offset = <22>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand>;
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nand-ecc-mode = "soft";
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gpios = <&pioC 2 0
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0
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&pioB 1 0
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>;
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status = "disabled";
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};
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usb0: ohci@00300000 {
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compatible = "atmel,at91rm9200-ohci", "usb-ohci";
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reg = <0x00300000 0x100000>;
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interrupts = <23 4 2>;
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status = "disabled";
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};
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};
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i2c@0 {
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compatible = "i2c-gpio";
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gpios = <&pioA 25 0 /* sda */
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&pioA 26 0 /* scl */
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>;
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i2c-gpio,sda-open-drain;
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i2c-gpio,scl-open-drain;
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i2c-gpio,delay-us = <2>; /* ~100 kHz */
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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