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Reset lines with indices smaller than 8 are currently considered invalid by the rt2880-reset reset controller. The MT7621 SoC uses a number of these low reset lines. The DTS defines reset lines "hsdma", "fe", and "mcm" with respective values 5, 6, and 2. As a result of the above restriction, these resets cannot be asserted or de-asserted by the reset controller. In cases where the bootloader does not de-assert these lines, this results in e.g. the MT7621's internal switch staying in reset. Change the reset controller to only ignore the system reset, so all reset lines with index greater than 0 are considered valid. Signed-off-by: Sander Vanheule <sander@svanheule.net> Acked-by: John Crispin <john@phrozen.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
105 lines
2.1 KiB
C
105 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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*
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* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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* Copyright (C) 2013 John Crispin <john@phrozen.org>
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*/
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#include <linux/pm.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/delay.h>
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#include <linux/reset-controller.h>
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#include <asm/reboot.h>
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#include <asm/mach-ralink/ralink_regs.h>
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/* Reset Control */
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#define SYSC_REG_RESET_CTRL 0x034
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#define RSTCTL_RESET_PCI BIT(26)
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#define RSTCTL_RESET_SYSTEM BIT(0)
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static int ralink_assert_device(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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u32 val;
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if (id == 0)
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return -1;
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val = rt_sysc_r32(SYSC_REG_RESET_CTRL);
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val |= BIT(id);
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rt_sysc_w32(val, SYSC_REG_RESET_CTRL);
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return 0;
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}
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static int ralink_deassert_device(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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u32 val;
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if (id == 0)
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return -1;
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val = rt_sysc_r32(SYSC_REG_RESET_CTRL);
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val &= ~BIT(id);
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rt_sysc_w32(val, SYSC_REG_RESET_CTRL);
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return 0;
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}
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static int ralink_reset_device(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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ralink_assert_device(rcdev, id);
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return ralink_deassert_device(rcdev, id);
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}
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static const struct reset_control_ops reset_ops = {
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.reset = ralink_reset_device,
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.assert = ralink_assert_device,
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.deassert = ralink_deassert_device,
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};
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static struct reset_controller_dev reset_dev = {
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.ops = &reset_ops,
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.owner = THIS_MODULE,
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.nr_resets = 32,
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.of_reset_n_cells = 1,
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};
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void ralink_rst_init(void)
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{
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reset_dev.of_node = of_find_compatible_node(NULL, NULL,
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"ralink,rt2880-reset");
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if (!reset_dev.of_node)
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pr_err("Failed to find reset controller node");
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else
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reset_controller_register(&reset_dev);
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}
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static void ralink_restart(char *command)
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{
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if (IS_ENABLED(CONFIG_PCI)) {
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rt_sysc_m32(0, RSTCTL_RESET_PCI, SYSC_REG_RESET_CTRL);
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mdelay(50);
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}
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local_irq_disable();
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rt_sysc_w32(RSTCTL_RESET_SYSTEM, SYSC_REG_RESET_CTRL);
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unreachable();
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}
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static int __init mips_reboot_setup(void)
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{
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_machine_restart = ralink_restart;
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return 0;
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}
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arch_initcall(mips_reboot_setup);
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