linux/arch/openrisc
Linus Torvalds 8700c95adb Merge branch 'smp-hotplug-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull SMP/hotplug changes from Ingo Molnar:
 "This is a pretty large, multi-arch series unifying and generalizing
  the various disjunct pieces of idle routines that architectures have
  historically copied from each other and have grown in random, wildly
  inconsistent and sometimes buggy directions:

   101 files changed, 455 insertions(+), 1328 deletions(-)

  this went through a number of review and test iterations before it was
  committed, it was tested on various architectures, was exposed to
  linux-next for quite some time - nevertheless it might cause problems
  on architectures that don't read the mailing lists and don't regularly
  test linux-next.

  This cat herding excercise was motivated by the -rt kernel, and was
  brought to you by Thomas "the Whip" Gleixner."

* 'smp-hotplug-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (40 commits)
  idle: Remove GENERIC_IDLE_LOOP config switch
  um: Use generic idle loop
  ia64: Make sure interrupts enabled when we "safe_halt()"
  sparc: Use generic idle loop
  idle: Remove unused ARCH_HAS_DEFAULT_IDLE
  bfin: Fix typo in arch_cpu_idle()
  xtensa: Use generic idle loop
  x86: Use generic idle loop
  unicore: Use generic idle loop
  tile: Use generic idle loop
  tile: Enter idle with preemption disabled
  sh: Use generic idle loop
  score: Use generic idle loop
  s390: Use generic idle loop
  powerpc: Use generic idle loop
  parisc: Use generic idle loop
  openrisc: Use generic idle loop
  mn10300: Use generic idle loop
  mips: Use generic idle loop
  microblaze: Use generic idle loop
  ...
2013-04-30 07:50:17 -07:00
..
boot/dts openrisc: use new common dtc rule 2012-12-03 17:17:48 -06:00
configs OpenRISC: Build infrastructure 2011-07-22 18:46:30 +02:00
include arch: Consolidate tsk_is_polling() 2013-04-08 17:39:22 +02:00
kernel openrisc: Use generic idle loop 2013-04-08 17:39:27 +02:00
lib ARCH: drivers remove __dev* attributes. 2013-01-03 15:57:13 -08:00
mm mm/openrisc: use common help functions to free reserved pages 2013-04-29 15:54:30 -07:00
Kconfig idle: Remove GENERIC_IDLE_LOOP config switch 2013-04-17 10:39:38 +02:00
Makefile openrisc: use new common dtc rule 2012-12-03 17:17:48 -06:00
README.openrisc OpenRISC: Miscellaneous 2011-07-22 18:46:41 +02:00
TODO.openrisc OpenRISC: Miscellaneous 2011-07-22 18:46:41 +02:00

OpenRISC Linux
==============

This is a port of Linux to the OpenRISC class of microprocessors; the initial
target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k).

For information about OpenRISC processors and ongoing development:

	website		http://openrisc.net

For more information about Linux on OpenRISC, please contact South Pole AB.

	email:		info@southpole.se

	website:	http://southpole.se
			http://southpoleconsulting.com

---------------------------------------------------------------------

Build instructions for OpenRISC toolchain and Linux
===================================================

In order to build and run Linux for OpenRISC, you'll need at least a basic
toolchain and, perhaps, the architectural simulator.  Steps to get these bits
in place are outlined here.

1)  The toolchain can be obtained from openrisc.net.  Instructions for building
a toolchain can be found at:

http://openrisc.net/toolchain-build.html

2) or1ksim (optional)

or1ksim is the architectural simulator which will allow you to actually run
your OpenRISC Linux kernel if you don't have an OpenRISC processor at hand.

	git clone git://openrisc.net/jonas/or1ksim-svn

	cd or1ksim
	./configure --prefix=$OPENRISC_PREFIX
	make
	make install

3)  Linux kernel

Build the kernel as usual

	make ARCH=openrisc defconfig
	make ARCH=openrisc

4)  Run in architectural simulator

Grab the or1ksim platform configuration file (from the or1ksim source) and
together with your freshly built vmlinux, run your kernel with the following
incantation:

	sim -f arch/openrisc/or1ksim.cfg vmlinux

---------------------------------------------------------------------

Terminology
===========

In the code, the following particles are used on symbols to limit the scope
to more or less specific processor implementations:

openrisc: the OpenRISC class of processors
or1k:     the OpenRISC 1000 family of processors
or1200:   the OpenRISC 1200 processor

---------------------------------------------------------------------

History
========

18. 11. 2003	Matjaz Breskvar (phoenix@bsemi.com)
	initial port of linux to OpenRISC/or32 architecture.
        all the core stuff is implemented and seams usable.

08. 12. 2003	Matjaz Breskvar (phoenix@bsemi.com)
	complete change of TLB miss handling.
	rewrite of exceptions handling.
	fully functional sash-3.6 in default initrd.
	a much improved version with changes all around.

10. 04. 2004	Matjaz Breskvar (phoenix@bsemi.com)
	alot of bugfixes all over.
	ethernet support, functional http and telnet servers.
	running many standard linux apps.

26. 06. 2004	Matjaz Breskvar (phoenix@bsemi.com)
	port to 2.6.x

30. 11. 2004	Matjaz Breskvar (phoenix@bsemi.com)
	lots of bugfixes and enhancments.
	added opencores framebuffer driver.

09. 10. 2010    Jonas Bonn (jonas@southpole.se)
	major rewrite to bring up to par with upstream Linux 2.6.36