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e552684809
Split off all code specific to the MaxSX8 cards to a separate ddbridge-sx8 module and hook it up in the Makefile. This also adds evaluation of the mci_type to allow for using different attach handling for different cards. As different cards can implement things differently (ie. support differing frontend_ops, and have different base structs being put ontop of the common mci_base struct), this introduces the mci_cfg struct which is initially used to hold a few specifics to the -sx8 submodule. While at it, the handling of the i/q mode is adjusted slightly. Besides this and handling mci_base and sx8_base struct pointers where needed, all code is copied unmodified from ddbridge-mci.c. Picked up from the upstream dddvb GIT. Signed-off-by: Daniel Scheller <d.scheller@gmx.net> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
179 lines
4.3 KiB
C
179 lines
4.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* ddbridge-mci.c: Digital Devices microcode interface
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*
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* Copyright (C) 2017-2018 Digital Devices GmbH
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* Ralph Metzler <rjkm@metzlerbros.de>
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* Marcus Metzler <mocm@metzlerbros.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 only, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "ddbridge.h"
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#include "ddbridge-io.h"
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#include "ddbridge-mci.h"
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static LIST_HEAD(mci_list);
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static int mci_reset(struct mci *state)
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{
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struct ddb_link *link = state->base->link;
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u32 status = 0;
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u32 timeout = 40;
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ddblwritel(link, MCI_CONTROL_RESET, MCI_CONTROL);
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ddblwritel(link, 0, MCI_CONTROL + 4); /* 1= no internal init */
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msleep(300);
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ddblwritel(link, 0, MCI_CONTROL);
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while (1) {
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status = ddblreadl(link, MCI_CONTROL);
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if ((status & MCI_CONTROL_READY) == MCI_CONTROL_READY)
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break;
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if (--timeout == 0)
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break;
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msleep(50);
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}
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if ((status & MCI_CONTROL_READY) == 0)
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return -1;
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if (link->ids.device == 0x0009)
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ddblwritel(link, SX8_TSCONFIG_MODE_NORMAL, SX8_TSCONFIG);
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return 0;
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}
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int ddb_mci_config(struct mci *state, u32 config)
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{
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struct ddb_link *link = state->base->link;
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if (link->ids.device != 0x0009)
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return -EINVAL;
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ddblwritel(link, config, SX8_TSCONFIG);
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return 0;
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}
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static int _mci_cmd_unlocked(struct mci *state,
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u32 *cmd, u32 cmd_len,
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u32 *res, u32 res_len)
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{
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struct ddb_link *link = state->base->link;
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u32 i, val;
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unsigned long stat;
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val = ddblreadl(link, MCI_CONTROL);
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if (val & (MCI_CONTROL_RESET | MCI_CONTROL_START_COMMAND))
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return -EIO;
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if (cmd && cmd_len)
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for (i = 0; i < cmd_len; i++)
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ddblwritel(link, cmd[i], MCI_COMMAND + i * 4);
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val |= (MCI_CONTROL_START_COMMAND | MCI_CONTROL_ENABLE_DONE_INTERRUPT);
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ddblwritel(link, val, MCI_CONTROL);
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stat = wait_for_completion_timeout(&state->base->completion, HZ);
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if (stat == 0) {
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dev_warn(state->base->dev, "MCI-%d: MCI timeout\n", state->nr);
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return -EIO;
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}
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if (res && res_len)
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for (i = 0; i < res_len; i++)
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res[i] = ddblreadl(link, MCI_RESULT + i * 4);
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return 0;
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}
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int ddb_mci_cmd(struct mci *state,
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struct mci_command *command,
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struct mci_result *result)
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{
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int stat;
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mutex_lock(&state->base->mci_lock);
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stat = _mci_cmd_unlocked(state,
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(u32 *)command, sizeof(*command) / sizeof(u32),
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(u32 *)result, sizeof(*result) / sizeof(u32));
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mutex_unlock(&state->base->mci_lock);
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return stat;
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}
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static void mci_handler(void *priv)
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{
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struct mci_base *base = (struct mci_base *)priv;
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complete(&base->completion);
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}
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static struct mci_base *match_base(void *key)
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{
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struct mci_base *p;
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list_for_each_entry(p, &mci_list, mci_list)
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if (p->key == key)
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return p;
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return NULL;
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}
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static int probe(struct mci *state)
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{
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mci_reset(state);
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return 0;
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}
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struct dvb_frontend
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*ddb_mci_attach(struct ddb_input *input, struct mci_cfg *cfg, int nr,
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int (**fn_set_input)(struct dvb_frontend *fe, int input))
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{
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struct ddb_port *port = input->port;
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struct ddb *dev = port->dev;
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struct ddb_link *link = &dev->link[port->lnr];
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struct mci_base *base;
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struct mci *state;
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void *key = cfg->type ? (void *)port : (void *)link;
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state = kzalloc(cfg->state_size, GFP_KERNEL);
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if (!state)
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return NULL;
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base = match_base(key);
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if (base) {
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base->count++;
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state->base = base;
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} else {
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base = kzalloc(cfg->base_size, GFP_KERNEL);
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if (!base)
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goto fail;
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base->key = key;
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base->count = 1;
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base->link = link;
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base->dev = dev->dev;
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mutex_init(&base->mci_lock);
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mutex_init(&base->tuner_lock);
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ddb_irq_set(dev, link->nr, 0, mci_handler, base);
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init_completion(&base->completion);
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state->base = base;
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if (probe(state) < 0) {
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kfree(base);
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goto fail;
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}
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list_add(&base->mci_list, &mci_list);
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if (cfg->base_init)
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cfg->base_init(base);
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}
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memcpy(&state->fe.ops, cfg->fe_ops, sizeof(struct dvb_frontend_ops));
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state->fe.demodulator_priv = state;
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state->nr = nr;
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*fn_set_input = cfg->set_input;
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state->tuner = nr;
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state->demod = nr;
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if (cfg->init)
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cfg->init(state);
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return &state->fe;
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fail:
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kfree(state);
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return NULL;
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}
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