linux/drivers/gpu
Jinzhou Su 860cc26a01 drm/amdgpu: Add RLC_PG_DELAY_3 for Vangogh
Driver should enable the CGPG feature for RLC in safe mode to
prevent any misalignment or conflict in middle of any power
feature entry/exit sequence.
Achieved by setting RLC_PG_CNTL.GFX_POWER_GATING_ENABLE = 0x1,
and RLC_PG_DELAY_3.CGCG_ACTIVE_BEFORE_CGPG to the desired CGPG
hysteresis value in refclk count.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-21 09:53:33 -05:00
..
drm drm/amdgpu: Add RLC_PG_DELAY_3 for Vangogh 2021-01-21 09:53:33 -05:00
host1x gpu/host1x: bus: Add missing description for 'driver' 2020-11-05 22:12:55 +01:00
ipu-v3 gpu/ipu-v3/ipu-di: Strip out 2 unused 'di_sync_config' entries 2021-01-04 12:54:18 +01:00
trace
vga pci-v5.11-changes 2020-12-15 16:49:59 -08:00
Makefile