mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-24 11:34:50 +08:00
85fa0c7f8d
All Rockchip SoCs at least down to the ARM9-based RK28xx include the reset- controller for SoC peripherals in their clock controller. While the older SoCs (ARM9 and Cortex-A8) use a regular scheme to change register values, the Cortex-A9 SoCs use a hiword-mask making locking unecessary. To be compatible with both schemes the reset controller takes a flag to decide which scheme to use, similar to the other HIWORD_MASK flags used in the clock framework. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-By: Max Schwarz <max.schwarz@online.de> Tested-By: Max Schwarz <max.schwarz@online.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
9 lines
142 B
Makefile
9 lines
142 B
Makefile
#
|
|
# Rockchip Clock specific Makefile
|
|
#
|
|
|
|
obj-y += clk-rockchip.o
|
|
obj-y += clk.o
|
|
obj-y += clk-pll.o
|
|
obj-$(CONFIG_RESET_CONTROLLER) += softrst.o
|