Martin Schiller 44a374c066 MIPS: Lantiq: Fix ASC0/ASC1 clocks ... ASC1 is available on every Lantiq SoC (also AmazonSE) and should be enabled like the other generic xway clocks instead of ASC0, which is only available for AR9 and Danube. Signed-off-by: Martin Schiller <ms@dev.tdt.de> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: John Crispin <john@phrozen.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Felix Fietkau <nbd@nbd.name> Cc: Martin Schiller <ms@dev.tdt.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16145/ [jhogan@kernel.org: Drop braces] Signed-off-by: James Hogan <jhogan@kernel.org>		2017-11-07 22:40:15 +00:00
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clk.c	MIPS: Change my email address	2016-05-13 14:02:18 +02:00
dcdc.c	MIPS: Change my email address	2016-05-13 14:02:18 +02:00
dma.c	MIPS: Audit and remove any unnecessary uses of module.h	2017-02-14 09:00:25 +00:00
gptu.c	MIPS: Audit and remove any unnecessary uses of module.h	2017-02-14 09:00:25 +00:00
Makefile	MIPS: lantiq: Remove the arch/mips/lantiq/xway/reset.c implementation	2017-09-04 21:19:03 +02:00
prom.c	MIPS: Change my email address	2016-05-13 14:02:18 +02:00
sysctrl.c	MIPS: Lantiq: Fix ASC0/ASC1 clocks	2017-11-07 22:40:15 +00:00
vmmc.c	MIPS: Lantiq: Make vmmc explicitly non-modular	2016-10-04 16:13:57 +02:00