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6c224da4d7
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240202071800.41113-1-liubo03@inspur.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
468 lines
11 KiB
C
468 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* lm83.c - Part of lm_sensors, Linux kernel modules for hardware
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* monitoring
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* Copyright (C) 2003-2009 Jean Delvare <jdelvare@suse.de>
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*
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* Heavily inspired from the lm78, lm75 and adm1021 drivers. The LM83 is
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* a sensor chip made by National Semiconductor. It reports up to four
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* temperatures (its own plus up to three external ones) with a 1 deg
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* resolution and a 3-4 deg accuracy. Complete datasheet can be obtained
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* from National's website at:
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* http://www.national.com/pf/LM/LM83.html
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* Since the datasheet omits to give the chip stepping code, I give it
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* here: 0x03 (at register 0xff).
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*
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* Also supports the LM82 temp sensor, which is basically a stripped down
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* model of the LM83. Datasheet is here:
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* http://www.national.com/pf/LM/LM82.html
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*/
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#include <linux/bits.h>
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#include <linux/err.h>
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#include <linux/i2c.h>
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#include <linux/init.h>
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#include <linux/hwmon.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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/*
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* Addresses to scan
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* Address is selected using 2 three-level pins, resulting in 9 possible
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* addresses.
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*/
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static const unsigned short normal_i2c[] = {
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0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x4c, 0x4d, 0x4e, I2C_CLIENT_END };
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enum chips { lm83, lm82 };
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/*
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* The LM83 registers
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* Manufacturer ID is 0x01 for National Semiconductor.
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*/
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#define LM83_REG_R_MAN_ID 0xFE
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#define LM83_REG_R_CHIP_ID 0xFF
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#define LM83_REG_R_CONFIG 0x03
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#define LM83_REG_W_CONFIG 0x09
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#define LM83_REG_R_STATUS1 0x02
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#define LM83_REG_R_STATUS2 0x35
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#define LM83_REG_R_LOCAL_TEMP 0x00
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#define LM83_REG_R_LOCAL_HIGH 0x05
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#define LM83_REG_W_LOCAL_HIGH 0x0B
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#define LM83_REG_R_REMOTE1_TEMP 0x30
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#define LM83_REG_R_REMOTE1_HIGH 0x38
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#define LM83_REG_W_REMOTE1_HIGH 0x50
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#define LM83_REG_R_REMOTE2_TEMP 0x01
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#define LM83_REG_R_REMOTE2_HIGH 0x07
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#define LM83_REG_W_REMOTE2_HIGH 0x0D
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#define LM83_REG_R_REMOTE3_TEMP 0x31
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#define LM83_REG_R_REMOTE3_HIGH 0x3A
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#define LM83_REG_W_REMOTE3_HIGH 0x52
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#define LM83_REG_R_TCRIT 0x42
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#define LM83_REG_W_TCRIT 0x5A
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static const u8 LM83_REG_TEMP[] = {
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LM83_REG_R_LOCAL_TEMP,
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LM83_REG_R_REMOTE1_TEMP,
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LM83_REG_R_REMOTE2_TEMP,
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LM83_REG_R_REMOTE3_TEMP,
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};
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static const u8 LM83_REG_MAX[] = {
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LM83_REG_R_LOCAL_HIGH,
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LM83_REG_R_REMOTE1_HIGH,
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LM83_REG_R_REMOTE2_HIGH,
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LM83_REG_R_REMOTE3_HIGH,
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};
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/* alarm and fault registers and bits, indexed by channel */
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static const u8 LM83_ALARM_REG[] = {
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LM83_REG_R_STATUS1, LM83_REG_R_STATUS2, LM83_REG_R_STATUS1, LM83_REG_R_STATUS2
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};
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static const u8 LM83_MAX_ALARM_BIT[] = {
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BIT(6), BIT(7), BIT(4), BIT(4)
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};
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static const u8 LM83_CRIT_ALARM_BIT[] = {
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BIT(0), BIT(0), BIT(1), BIT(1)
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};
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static const u8 LM83_FAULT_BIT[] = {
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0, BIT(5), BIT(2), BIT(2)
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};
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/*
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* Client data (each client gets its own)
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*/
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struct lm83_data {
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struct regmap *regmap;
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enum chips type;
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};
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/* regmap code */
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static int lm83_regmap_reg_read(void *context, unsigned int reg, unsigned int *val)
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{
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struct i2c_client *client = context;
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int ret;
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ret = i2c_smbus_read_byte_data(client, reg);
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if (ret < 0)
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return ret;
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*val = ret;
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return 0;
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}
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/*
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* The regmap write function maps read register addresses to write register
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* addresses. This is necessary for regmap register caching to work.
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* An alternative would be to clear the regmap cache whenever a register is
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* written, but that would be much more expensive.
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*/
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static int lm83_regmap_reg_write(void *context, unsigned int reg, unsigned int val)
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{
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struct i2c_client *client = context;
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switch (reg) {
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case LM83_REG_R_CONFIG:
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case LM83_REG_R_LOCAL_HIGH:
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case LM83_REG_R_REMOTE2_HIGH:
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reg += 0x06;
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break;
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case LM83_REG_R_REMOTE1_HIGH:
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case LM83_REG_R_REMOTE3_HIGH:
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case LM83_REG_R_TCRIT:
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reg += 0x18;
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break;
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default:
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break;
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}
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return i2c_smbus_write_byte_data(client, reg, val);
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}
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static bool lm83_regmap_is_volatile(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case LM83_REG_R_LOCAL_TEMP:
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case LM83_REG_R_REMOTE1_TEMP:
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case LM83_REG_R_REMOTE2_TEMP:
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case LM83_REG_R_REMOTE3_TEMP:
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case LM83_REG_R_STATUS1:
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case LM83_REG_R_STATUS2:
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return true;
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default:
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return false;
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}
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}
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static const struct regmap_config lm83_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.cache_type = REGCACHE_MAPLE,
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.volatile_reg = lm83_regmap_is_volatile,
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.reg_read = lm83_regmap_reg_read,
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.reg_write = lm83_regmap_reg_write,
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};
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/* hwmon API */
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static int lm83_temp_read(struct device *dev, u32 attr, int channel, long *val)
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{
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struct lm83_data *data = dev_get_drvdata(dev);
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unsigned int regval;
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int err;
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switch (attr) {
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case hwmon_temp_input:
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err = regmap_read(data->regmap, LM83_REG_TEMP[channel], ®val);
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if (err < 0)
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return err;
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*val = (s8)regval * 1000;
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break;
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case hwmon_temp_max:
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err = regmap_read(data->regmap, LM83_REG_MAX[channel], ®val);
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if (err < 0)
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return err;
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*val = (s8)regval * 1000;
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break;
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case hwmon_temp_crit:
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err = regmap_read(data->regmap, LM83_REG_R_TCRIT, ®val);
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if (err < 0)
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return err;
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*val = (s8)regval * 1000;
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break;
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case hwmon_temp_max_alarm:
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err = regmap_read(data->regmap, LM83_ALARM_REG[channel], ®val);
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if (err < 0)
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return err;
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*val = !!(regval & LM83_MAX_ALARM_BIT[channel]);
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break;
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case hwmon_temp_crit_alarm:
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err = regmap_read(data->regmap, LM83_ALARM_REG[channel], ®val);
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if (err < 0)
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return err;
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*val = !!(regval & LM83_CRIT_ALARM_BIT[channel]);
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break;
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case hwmon_temp_fault:
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err = regmap_read(data->regmap, LM83_ALARM_REG[channel], ®val);
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if (err < 0)
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return err;
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*val = !!(regval & LM83_FAULT_BIT[channel]);
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break;
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default:
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return -EOPNOTSUPP;
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}
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return 0;
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}
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static int lm83_temp_write(struct device *dev, u32 attr, int channel, long val)
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{
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struct lm83_data *data = dev_get_drvdata(dev);
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unsigned int regval;
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int err;
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regval = DIV_ROUND_CLOSEST(clamp_val(val, -128000, 127000), 1000);
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switch (attr) {
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case hwmon_temp_max:
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err = regmap_write(data->regmap, LM83_REG_MAX[channel], regval);
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if (err < 0)
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return err;
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break;
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case hwmon_temp_crit:
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err = regmap_write(data->regmap, LM83_REG_R_TCRIT, regval);
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if (err < 0)
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return err;
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break;
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default:
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return -EOPNOTSUPP;
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}
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return 0;
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}
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static int lm83_chip_read(struct device *dev, u32 attr, int channel, long *val)
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{
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struct lm83_data *data = dev_get_drvdata(dev);
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unsigned int regval;
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int err;
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switch (attr) {
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case hwmon_chip_alarms:
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err = regmap_read(data->regmap, LM83_REG_R_STATUS1, ®val);
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if (err < 0)
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return err;
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*val = regval;
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err = regmap_read(data->regmap, LM83_REG_R_STATUS2, ®val);
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if (err < 0)
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return err;
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*val |= regval << 8;
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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return 0;
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}
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static int lm83_read(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long *val)
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{
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switch (type) {
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case hwmon_chip:
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return lm83_chip_read(dev, attr, channel, val);
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case hwmon_temp:
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return lm83_temp_read(dev, attr, channel, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static int lm83_write(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long val)
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{
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switch (type) {
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case hwmon_temp:
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return lm83_temp_write(dev, attr, channel, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static umode_t lm83_is_visible(const void *_data, enum hwmon_sensor_types type,
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u32 attr, int channel)
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{
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const struct lm83_data *data = _data;
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/*
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* LM82 only supports a single external channel, modeled as channel 2.
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*/
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if (data->type == lm82 && (channel == 1 || channel == 3))
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return 0;
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switch (type) {
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case hwmon_chip:
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if (attr == hwmon_chip_alarms)
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return 0444;
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break;
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case hwmon_temp:
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switch (attr) {
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case hwmon_temp_input:
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case hwmon_temp_max_alarm:
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case hwmon_temp_crit_alarm:
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return 0444;
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case hwmon_temp_fault:
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if (channel)
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return 0444;
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break;
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case hwmon_temp_max:
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return 0644;
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case hwmon_temp_crit:
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if (channel == 2)
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return 0644;
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return 0444;
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default:
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break;
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}
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break;
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default:
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break;
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}
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return 0;
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}
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static const struct hwmon_channel_info * const lm83_info[] = {
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HWMON_CHANNEL_INFO(chip, HWMON_C_ALARMS),
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HWMON_CHANNEL_INFO(temp,
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HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
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HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM,
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HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
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HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT,
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HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
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HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT,
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HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
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HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT
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),
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NULL
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};
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static const struct hwmon_ops lm83_hwmon_ops = {
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.is_visible = lm83_is_visible,
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.read = lm83_read,
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.write = lm83_write,
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};
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static const struct hwmon_chip_info lm83_chip_info = {
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.ops = &lm83_hwmon_ops,
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.info = lm83_info,
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};
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/* Return 0 if detection is successful, -ENODEV otherwise */
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static int lm83_detect(struct i2c_client *client,
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struct i2c_board_info *info)
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{
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struct i2c_adapter *adapter = client->adapter;
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const char *name;
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u8 man_id, chip_id;
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if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
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return -ENODEV;
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/* Detection */
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if ((i2c_smbus_read_byte_data(client, LM83_REG_R_STATUS1) & 0xA8) ||
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(i2c_smbus_read_byte_data(client, LM83_REG_R_STATUS2) & 0x48) ||
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(i2c_smbus_read_byte_data(client, LM83_REG_R_CONFIG) & 0x41)) {
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dev_dbg(&adapter->dev, "LM83 detection failed at 0x%02x\n",
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client->addr);
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return -ENODEV;
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}
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/* Identification */
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man_id = i2c_smbus_read_byte_data(client, LM83_REG_R_MAN_ID);
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if (man_id != 0x01) /* National Semiconductor */
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return -ENODEV;
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chip_id = i2c_smbus_read_byte_data(client, LM83_REG_R_CHIP_ID);
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switch (chip_id) {
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case 0x03:
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/*
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* According to the LM82 datasheet dated March 2013, recent
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* revisions of LM82 have a die revision of 0x03. This was
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* confirmed with a real chip. Further details in this revision
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* of the LM82 datasheet strongly suggest that LM82 is just a
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* repackaged LM83. It is therefore impossible to distinguish
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* those chips from LM83, and they will be misdetected as LM83.
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*/
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name = "lm83";
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break;
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case 0x01:
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name = "lm82";
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break;
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default:
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/* identification failed */
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dev_dbg(&adapter->dev,
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"Unsupported chip (man_id=0x%02X, chip_id=0x%02X)\n",
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man_id, chip_id);
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return -ENODEV;
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}
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strscpy(info->type, name, I2C_NAME_SIZE);
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return 0;
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}
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static const struct i2c_device_id lm83_id[] = {
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{ "lm83", lm83 },
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{ "lm82", lm82 },
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{ }
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};
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MODULE_DEVICE_TABLE(i2c, lm83_id);
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static int lm83_probe(struct i2c_client *client)
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{
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struct device *dev = &client->dev;
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struct device *hwmon_dev;
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struct lm83_data *data;
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data = devm_kzalloc(dev, sizeof(struct lm83_data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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data->regmap = devm_regmap_init(dev, NULL, client, &lm83_regmap_config);
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if (IS_ERR(data->regmap))
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return PTR_ERR(data->regmap);
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data->type = i2c_match_id(lm83_id, client)->driver_data;
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hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
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data, &lm83_chip_info, NULL);
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return PTR_ERR_OR_ZERO(hwmon_dev);
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}
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/*
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* Driver data (common to all clients)
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*/
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static struct i2c_driver lm83_driver = {
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.class = I2C_CLASS_HWMON,
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.driver = {
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.name = "lm83",
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},
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.probe = lm83_probe,
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.id_table = lm83_id,
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.detect = lm83_detect,
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.address_list = normal_i2c,
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};
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module_i2c_driver(lm83_driver);
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MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
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MODULE_DESCRIPTION("LM83 driver");
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MODULE_LICENSE("GPL");
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