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fcfa0e84ea
Switch to use phy-gmii-sel PHY instead of cpsw-phy-sel. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
75 lines
1.7 KiB
Plaintext
75 lines
1.7 KiB
Plaintext
/*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* VScom OnRISC
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* http://www.vscom.de
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*/
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/dts-v1/;
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#include "am335x-baltos.dtsi"
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#include "am335x-baltos-leds.dtsi"
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/ {
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model = "OnRISC Baltos iR 2110";
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};
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&am33xx_pinmux {
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uart1_pins: pinmux_uart1_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE0) /* uart1_rxd */
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AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE0) /* uart1_txd */
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AM33XX_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart1_ctsn */
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AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn */
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AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.gpio2[22] DTR */
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AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.gpio2[23] DSR */
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AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.gpio2[24] DCD */
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AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.gpio2[25] RI */
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>;
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};
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
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dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
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dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
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rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&usb0_phy {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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dr_mode = "host";
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};
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&davinci_mdio {
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phy0: ethernet-phy@0 {
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reg = <1>;
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};
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};
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&cpsw_emac0 {
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phy-mode = "rmii";
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dual_emac_res_vlan = <1>;
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phy-handle = <&phy0>;
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};
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&cpsw_emac1 {
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phy-mode = "rgmii-txid";
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dual_emac_res_vlan = <2>;
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phy-handle = <&phy1>;
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};
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