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84705fc165
This is another switch from Vitesse / Microsemi / Microchip, that has 10 ports (8 external, 2 internal) and is integrated into the Freescale / NXP T1040 PowerPC SoC. It is very similar to Felix from NXP LS1028A, except that this is a platform device and Felix is a PCI device, and it doesn't support IEEE 1588 and TSN. Like Felix, this driver configures its own PCS on the internal MDIO bus using a phy_device abstraction for it (yes, it will be refactored to use a raw mdio_device, like other phylink drivers do, but let's keep it like that for now). But unlike Felix, the MDIO bus and the PCS are not from the same vendor. The PCS is the same QorIQ/Layerscape PCS as found in Felix/ENETC/DPAA*, but the internal MDIO bus that is used to access it is actually an instantiation of drivers/net/phy/mdio-mscc-miim.c. But it would be difficult to reuse that driver (it doesn't even use regmap, and it's less than 200 lines of code), so we hand-roll here some internal MDIO bus accessors within seville_vsc9953.c, which serves the purpose of driving the PCS absolutely fine. Also, same as Felix, the PCS doesn't support dynamic reconfiguration of SerDes protocol, so we need to do pre-validation of PHY mode from device tree and not let phylink change it. Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
79 lines
2.6 KiB
C
79 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright 2019 NXP Semiconductors
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*/
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#ifndef _MSCC_FELIX_H
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#define _MSCC_FELIX_H
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#define ocelot_to_felix(o) container_of((o), struct felix, ocelot)
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#define FELIX_NUM_TC 8
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/* Platform-specific information */
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struct felix_info {
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const struct resource *target_io_res;
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const struct resource *port_io_res;
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const struct resource *imdio_res;
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const struct reg_field *regfields;
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const u32 *const *map;
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const struct ocelot_ops *ops;
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int shared_queue_sz;
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int num_mact_rows;
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const struct ocelot_stat_layout *stats_layout;
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unsigned int num_stats;
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int num_ports;
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int num_tx_queues;
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struct vcap_field *vcap_is2_keys;
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struct vcap_field *vcap_is2_actions;
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const struct vcap_props *vcap;
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int switch_pci_bar;
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int imdio_pci_bar;
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int (*mdio_bus_alloc)(struct ocelot *ocelot);
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void (*mdio_bus_free)(struct ocelot *ocelot);
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void (*pcs_config)(struct ocelot *ocelot, int port,
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unsigned int link_an_mode,
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const struct phylink_link_state *state);
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void (*pcs_link_up)(struct ocelot *ocelot, int port,
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unsigned int link_an_mode,
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phy_interface_t interface,
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int speed, int duplex);
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void (*pcs_link_state)(struct ocelot *ocelot, int port,
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struct phylink_link_state *state);
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void (*phylink_validate)(struct ocelot *ocelot, int port,
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unsigned long *supported,
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struct phylink_link_state *state);
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int (*prevalidate_phy_mode)(struct ocelot *ocelot, int port,
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phy_interface_t phy_mode);
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int (*port_setup_tc)(struct dsa_switch *ds, int port,
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enum tc_setup_type type, void *type_data);
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void (*port_sched_speed_set)(struct ocelot *ocelot, int port,
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u32 speed);
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void (*xmit_template_populate)(struct ocelot *ocelot, int port);
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};
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extern const struct dsa_switch_ops felix_switch_ops;
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extern struct pci_driver felix_vsc9959_pci_driver;
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extern struct platform_driver seville_vsc9953_driver;
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/* DSA glue / front-end for struct ocelot */
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struct felix {
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struct dsa_switch *ds;
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const struct felix_info *info;
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struct ocelot ocelot;
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struct mii_bus *imdio;
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struct phy_device **pcs;
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resource_size_t switch_base;
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resource_size_t imdio_base;
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};
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void vsc9959_pcs_link_state(struct ocelot *ocelot, int port,
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struct phylink_link_state *state);
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void vsc9959_pcs_config(struct ocelot *ocelot, int port,
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unsigned int link_an_mode,
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const struct phylink_link_state *state);
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void vsc9959_pcs_link_up(struct ocelot *ocelot, int port,
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unsigned int link_an_mode,
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phy_interface_t interface,
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int speed, int duplex);
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void vsc9959_mdio_bus_free(struct ocelot *ocelot);
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#endif
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