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2130fb97fe
st21nfca has 1 physical SWP line and can support up to 2 secure elements (UICC & eSE) thanks to an external switch managed with a gpio. The platform integrator needs to specify thanks to 2 initialization properties, uicc-present and ese-present, if it is suppose to have uicc and/or ese. Of course if the platform does not have an external switch, only one kind of secure element can be supported. Those parameters are under platform integrator responsibilities. During initialization, the white_list will be set according to those parameters. The discovery_se function will assume a secure element is physically present according to uicc-present and ese-present values and will add it to the secure element list. On ese activation, the atr is retrieved to calculate a command exchange timeout based on the first atr(TB) value. The se_io will allow to transfer data over SWP. 2 kind of events may appear after a data is sent over: - ST21NFCA_EVT_TRANSMIT_DATA when receiving an apdu answer - ST21NFCA_EVT_WTX_REQUEST when the secure element needs more time than expected to compute a command. If this timeout expired, a first recovery tentative consist to send a simple software reset proprietary command. If this tentative still fail, a second recovery tentative consist to send a hardware reset proprietary command. This function is only relevant for eSE like secure element. This patch also change the way a pipe is referenced. There can be different pipe connected to the same gate with different host destination (ex: CONNECTIVITY). In order to keep host information every pipe are reference with a tuple (gate, host). In order to reduce changes, we are keeping unchanged the way a gate is addressed on the Terminal Host. However, this is working because we consider the apdu reader gate is only present on the eSE slot also the connectivity gate cannot give a reliable value; it will give the latest stored pipe value. Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
696 lines
17 KiB
C
696 lines
17 KiB
C
/*
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* I2C Link Layer for ST21NFCA HCI based Driver
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* Copyright (C) 2014 STMicroelectronics SAS. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/crc-ccitt.h>
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#include <linux/module.h>
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#include <linux/i2c.h>
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#include <linux/gpio.h>
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#include <linux/of_irq.h>
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#include <linux/of_gpio.h>
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#include <linux/miscdevice.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/nfc.h>
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#include <linux/firmware.h>
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#include <linux/platform_data/st21nfca.h>
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#include <asm/unaligned.h>
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#include <net/nfc/hci.h>
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#include <net/nfc/llc.h>
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#include <net/nfc/nfc.h>
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#include "st21nfca.h"
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/*
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* Every frame starts with ST21NFCA_SOF_EOF and ends with ST21NFCA_SOF_EOF.
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* Because ST21NFCA_SOF_EOF is a possible data value, there is a mecanism
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* called byte stuffing has been introduced.
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*
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* if byte == ST21NFCA_SOF_EOF or ST21NFCA_ESCAPE_BYTE_STUFFING
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* - insert ST21NFCA_ESCAPE_BYTE_STUFFING (escape byte)
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* - xor byte with ST21NFCA_BYTE_STUFFING_MASK
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*/
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#define ST21NFCA_SOF_EOF 0x7e
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#define ST21NFCA_BYTE_STUFFING_MASK 0x20
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#define ST21NFCA_ESCAPE_BYTE_STUFFING 0x7d
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/* SOF + 00 */
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#define ST21NFCA_FRAME_HEADROOM 2
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/* 2 bytes crc + EOF */
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#define ST21NFCA_FRAME_TAILROOM 3
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#define IS_START_OF_FRAME(buf) (buf[0] == ST21NFCA_SOF_EOF && \
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buf[1] == 0)
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#define ST21NFCA_HCI_I2C_DRIVER_NAME "st21nfca_hci_i2c"
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static struct i2c_device_id st21nfca_hci_i2c_id_table[] = {
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{ST21NFCA_HCI_DRIVER_NAME, 0},
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{}
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};
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MODULE_DEVICE_TABLE(i2c, st21nfca_hci_i2c_id_table);
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struct st21nfca_i2c_phy {
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struct i2c_client *i2c_dev;
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struct nfc_hci_dev *hdev;
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unsigned int gpio_ena;
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unsigned int irq_polarity;
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struct st21nfca_se_status se_status;
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struct sk_buff *pending_skb;
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int current_read_len;
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/*
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* crc might have fail because i2c macro
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* is disable due to other interface activity
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*/
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int crc_trials;
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int powered;
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int run_mode;
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/*
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* < 0 if hardware error occured (e.g. i2c err)
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* and prevents normal operation.
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*/
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int hard_fault;
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struct mutex phy_lock;
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};
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static u8 len_seq[] = { 16, 24, 12, 29 };
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static u16 wait_tab[] = { 2, 3, 5, 15, 20, 40};
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#define I2C_DUMP_SKB(info, skb) \
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do { \
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pr_debug("%s:\n", info); \
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print_hex_dump(KERN_DEBUG, "i2c: ", DUMP_PREFIX_OFFSET, \
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16, 1, (skb)->data, (skb)->len, 0); \
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} while (0)
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/*
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* In order to get the CLF in a known state we generate an internal reboot
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* using a proprietary command.
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* Once the reboot is completed, we expect to receive a ST21NFCA_SOF_EOF
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* fill buffer.
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*/
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static int st21nfca_hci_platform_init(struct st21nfca_i2c_phy *phy)
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{
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u16 wait_reboot[] = { 50, 300, 1000 };
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char reboot_cmd[] = { 0x7E, 0x66, 0x48, 0xF6, 0x7E };
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u8 tmp[ST21NFCA_HCI_LLC_MAX_SIZE];
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int i, r = -1;
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for (i = 0; i < ARRAY_SIZE(wait_reboot) && r < 0; i++) {
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r = i2c_master_send(phy->i2c_dev, reboot_cmd,
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sizeof(reboot_cmd));
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if (r < 0)
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msleep(wait_reboot[i]);
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}
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if (r < 0)
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return r;
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/* CLF is spending about 20ms to do an internal reboot */
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msleep(20);
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r = -1;
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for (i = 0; i < ARRAY_SIZE(wait_reboot) && r < 0; i++) {
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r = i2c_master_recv(phy->i2c_dev, tmp,
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ST21NFCA_HCI_LLC_MAX_SIZE);
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if (r < 0)
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msleep(wait_reboot[i]);
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}
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if (r < 0)
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return r;
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for (i = 0; i < ST21NFCA_HCI_LLC_MAX_SIZE &&
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tmp[i] == ST21NFCA_SOF_EOF; i++)
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;
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if (r != ST21NFCA_HCI_LLC_MAX_SIZE)
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return -ENODEV;
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usleep_range(1000, 1500);
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return 0;
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}
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static int st21nfca_hci_i2c_enable(void *phy_id)
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{
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struct st21nfca_i2c_phy *phy = phy_id;
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gpio_set_value(phy->gpio_ena, 1);
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phy->powered = 1;
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phy->run_mode = ST21NFCA_HCI_MODE;
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usleep_range(10000, 15000);
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return 0;
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}
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static void st21nfca_hci_i2c_disable(void *phy_id)
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{
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struct st21nfca_i2c_phy *phy = phy_id;
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pr_info("\n");
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gpio_set_value(phy->gpio_ena, 0);
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phy->powered = 0;
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}
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static void st21nfca_hci_add_len_crc(struct sk_buff *skb)
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{
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u16 crc;
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u8 tmp;
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*skb_push(skb, 1) = 0;
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crc = crc_ccitt(0xffff, skb->data, skb->len);
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crc = ~crc;
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tmp = crc & 0x00ff;
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*skb_put(skb, 1) = tmp;
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tmp = (crc >> 8) & 0x00ff;
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*skb_put(skb, 1) = tmp;
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}
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static void st21nfca_hci_remove_len_crc(struct sk_buff *skb)
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{
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skb_pull(skb, ST21NFCA_FRAME_HEADROOM);
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skb_trim(skb, skb->len - ST21NFCA_FRAME_TAILROOM);
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}
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/*
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* Writing a frame must not return the number of written bytes.
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* It must return either zero for success, or <0 for error.
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* In addition, it must not alter the skb
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*/
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static int st21nfca_hci_i2c_write(void *phy_id, struct sk_buff *skb)
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{
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int r = -1, i, j;
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struct st21nfca_i2c_phy *phy = phy_id;
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struct i2c_client *client = phy->i2c_dev;
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u8 tmp[ST21NFCA_HCI_LLC_MAX_SIZE * 2];
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I2C_DUMP_SKB("st21nfca_hci_i2c_write", skb);
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if (phy->hard_fault != 0)
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return phy->hard_fault;
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/*
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* Compute CRC before byte stuffing computation on frame
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* Note st21nfca_hci_add_len_crc is doing a byte stuffing
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* on its own value
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*/
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st21nfca_hci_add_len_crc(skb);
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/* add ST21NFCA_SOF_EOF on tail */
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*skb_put(skb, 1) = ST21NFCA_SOF_EOF;
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/* add ST21NFCA_SOF_EOF on head */
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*skb_push(skb, 1) = ST21NFCA_SOF_EOF;
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/*
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* Compute byte stuffing
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* if byte == ST21NFCA_SOF_EOF or ST21NFCA_ESCAPE_BYTE_STUFFING
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* insert ST21NFCA_ESCAPE_BYTE_STUFFING (escape byte)
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* xor byte with ST21NFCA_BYTE_STUFFING_MASK
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*/
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tmp[0] = skb->data[0];
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for (i = 1, j = 1; i < skb->len - 1; i++, j++) {
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if (skb->data[i] == ST21NFCA_SOF_EOF
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|| skb->data[i] == ST21NFCA_ESCAPE_BYTE_STUFFING) {
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tmp[j] = ST21NFCA_ESCAPE_BYTE_STUFFING;
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j++;
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tmp[j] = skb->data[i] ^ ST21NFCA_BYTE_STUFFING_MASK;
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} else {
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tmp[j] = skb->data[i];
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}
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}
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tmp[j] = skb->data[i];
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j++;
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/*
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* Manage sleep mode
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* Try 3 times to send data with delay between each
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*/
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mutex_lock(&phy->phy_lock);
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for (i = 0; i < ARRAY_SIZE(wait_tab) && r < 0; i++) {
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r = i2c_master_send(client, tmp, j);
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if (r < 0)
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msleep(wait_tab[i]);
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}
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mutex_unlock(&phy->phy_lock);
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if (r >= 0) {
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if (r != j)
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r = -EREMOTEIO;
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else
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r = 0;
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}
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st21nfca_hci_remove_len_crc(skb);
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return r;
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}
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static int get_frame_size(u8 *buf, int buflen)
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{
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int len = 0;
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if (buf[len + 1] == ST21NFCA_SOF_EOF)
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return 0;
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for (len = 1; len < buflen && buf[len] != ST21NFCA_SOF_EOF; len++)
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;
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return len;
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}
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static int check_crc(u8 *buf, int buflen)
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{
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u16 crc;
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crc = crc_ccitt(0xffff, buf, buflen - 2);
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crc = ~crc;
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if (buf[buflen - 2] != (crc & 0xff) || buf[buflen - 1] != (crc >> 8)) {
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pr_err(ST21NFCA_HCI_DRIVER_NAME
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": CRC error 0x%x != 0x%x 0x%x\n", crc, buf[buflen - 1],
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buf[buflen - 2]);
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pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__);
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print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE,
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16, 2, buf, buflen, false);
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return -EPERM;
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}
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return 0;
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}
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/*
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* Prepare received data for upper layer.
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* Received data include byte stuffing, crc and sof/eof
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* which is not usable by hci part.
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* returns:
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* frame size without sof/eof, header and byte stuffing
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* -EBADMSG : frame was incorrect and discarded
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*/
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static int st21nfca_hci_i2c_repack(struct sk_buff *skb)
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{
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int i, j, r, size;
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if (skb->len < 1 || (skb->len > 1 && skb->data[1] != 0))
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return -EBADMSG;
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size = get_frame_size(skb->data, skb->len);
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if (size > 0) {
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skb_trim(skb, size);
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/* remove ST21NFCA byte stuffing for upper layer */
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for (i = 1, j = 0; i < skb->len; i++) {
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if (skb->data[i + j] ==
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(u8) ST21NFCA_ESCAPE_BYTE_STUFFING) {
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skb->data[i] = skb->data[i + j + 1]
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| ST21NFCA_BYTE_STUFFING_MASK;
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i++;
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j++;
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}
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skb->data[i] = skb->data[i + j];
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}
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/* remove byte stuffing useless byte */
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skb_trim(skb, i - j);
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/* remove ST21NFCA_SOF_EOF from head */
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skb_pull(skb, 1);
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r = check_crc(skb->data, skb->len);
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if (r != 0) {
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i = 0;
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return -EBADMSG;
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}
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/* remove headbyte */
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skb_pull(skb, 1);
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/* remove crc. Byte Stuffing is already removed here */
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skb_trim(skb, skb->len - 2);
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return skb->len;
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}
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return 0;
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}
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/*
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* Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees
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* that i2c bus will be flushed and that next read will start on a new frame.
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* returned skb contains only LLC header and payload.
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* returns:
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* frame size : if received frame is complete (find ST21NFCA_SOF_EOF at
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* end of read)
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* -EAGAIN : if received frame is incomplete (not find ST21NFCA_SOF_EOF
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* at end of read)
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* -EREMOTEIO : i2c read error (fatal)
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* -EBADMSG : frame was incorrect and discarded
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* (value returned from st21nfca_hci_i2c_repack)
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* -EIO : if no ST21NFCA_SOF_EOF is found after reaching
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* the read length end sequence
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*/
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static int st21nfca_hci_i2c_read(struct st21nfca_i2c_phy *phy,
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struct sk_buff *skb)
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{
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int r, i;
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u8 len;
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u8 buf[ST21NFCA_HCI_LLC_MAX_PAYLOAD];
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struct i2c_client *client = phy->i2c_dev;
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if (phy->current_read_len < ARRAY_SIZE(len_seq)) {
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len = len_seq[phy->current_read_len];
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/*
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* Add retry mecanism
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* Operation on I2C interface may fail in case of operation on
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* RF or SWP interface
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*/
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r = 0;
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mutex_lock(&phy->phy_lock);
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for (i = 0; i < ARRAY_SIZE(wait_tab) && r <= 0; i++) {
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r = i2c_master_recv(client, buf, len);
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if (r < 0)
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msleep(wait_tab[i]);
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}
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mutex_unlock(&phy->phy_lock);
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if (r != len) {
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phy->current_read_len = 0;
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return -EREMOTEIO;
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}
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/*
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* The first read sequence does not start with SOF.
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* Data is corrupeted so we drop it.
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*/
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if (!phy->current_read_len && !IS_START_OF_FRAME(buf)) {
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skb_trim(skb, 0);
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phy->current_read_len = 0;
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return -EIO;
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} else if (phy->current_read_len && IS_START_OF_FRAME(buf)) {
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/*
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* Previous frame transmission was interrupted and
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* the frame got repeated.
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* Received frame start with ST21NFCA_SOF_EOF + 00.
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*/
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skb_trim(skb, 0);
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phy->current_read_len = 0;
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}
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memcpy(skb_put(skb, len), buf, len);
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if (skb->data[skb->len - 1] == ST21NFCA_SOF_EOF) {
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phy->current_read_len = 0;
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return st21nfca_hci_i2c_repack(skb);
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}
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phy->current_read_len++;
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return -EAGAIN;
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}
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return -EIO;
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}
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/*
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* Reads an shdlc frame from the chip. This is not as straightforward as it
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* seems. The frame format is data-crc, and corruption can occur anywhere
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* while transiting on i2c bus, such that we could read an invalid data.
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* The tricky case is when we read a corrupted data or crc. We must detect
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* this here in order to determine that data can be transmitted to the hci
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* core. This is the reason why we check the crc here.
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* The CLF will repeat a frame until we send a RR on that frame.
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*
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* On ST21NFCA, IRQ goes in idle when read starts. As no size information are
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* available in the incoming data, other IRQ might come. Every IRQ will trigger
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* a read sequence with different length and will fill the current frame.
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* The reception is complete once we reach a ST21NFCA_SOF_EOF.
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*/
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static irqreturn_t st21nfca_hci_irq_thread_fn(int irq, void *phy_id)
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{
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struct st21nfca_i2c_phy *phy = phy_id;
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struct i2c_client *client;
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int r;
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if (!phy || irq != phy->i2c_dev->irq) {
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WARN_ON_ONCE(1);
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return IRQ_NONE;
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}
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client = phy->i2c_dev;
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dev_dbg(&client->dev, "IRQ\n");
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if (phy->hard_fault != 0)
|
|
return IRQ_HANDLED;
|
|
|
|
r = st21nfca_hci_i2c_read(phy, phy->pending_skb);
|
|
if (r == -EREMOTEIO) {
|
|
phy->hard_fault = r;
|
|
|
|
nfc_hci_recv_frame(phy->hdev, NULL);
|
|
|
|
return IRQ_HANDLED;
|
|
} else if (r == -EAGAIN || r == -EIO) {
|
|
return IRQ_HANDLED;
|
|
} else if (r == -EBADMSG && phy->crc_trials < ARRAY_SIZE(wait_tab)) {
|
|
/*
|
|
* With ST21NFCA, only one interface (I2C, RF or SWP)
|
|
* may be active at a time.
|
|
* Having incorrect crc is usually due to i2c macrocell
|
|
* deactivation in the middle of a transmission.
|
|
* It may generate corrupted data on i2c.
|
|
* We give sometime to get i2c back.
|
|
* The complete frame will be repeated.
|
|
*/
|
|
msleep(wait_tab[phy->crc_trials]);
|
|
phy->crc_trials++;
|
|
phy->current_read_len = 0;
|
|
kfree_skb(phy->pending_skb);
|
|
} else if (r > 0) {
|
|
/*
|
|
* We succeeded to read data from the CLF and
|
|
* data is valid.
|
|
* Reset counter.
|
|
*/
|
|
nfc_hci_recv_frame(phy->hdev, phy->pending_skb);
|
|
phy->crc_trials = 0;
|
|
} else {
|
|
kfree_skb(phy->pending_skb);
|
|
}
|
|
|
|
phy->pending_skb = alloc_skb(ST21NFCA_HCI_LLC_MAX_SIZE * 2, GFP_KERNEL);
|
|
if (phy->pending_skb == NULL) {
|
|
phy->hard_fault = -ENOMEM;
|
|
nfc_hci_recv_frame(phy->hdev, NULL);
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static struct nfc_phy_ops i2c_phy_ops = {
|
|
.write = st21nfca_hci_i2c_write,
|
|
.enable = st21nfca_hci_i2c_enable,
|
|
.disable = st21nfca_hci_i2c_disable,
|
|
};
|
|
|
|
#ifdef CONFIG_OF
|
|
static int st21nfca_hci_i2c_of_request_resources(struct i2c_client *client)
|
|
{
|
|
struct st21nfca_i2c_phy *phy = i2c_get_clientdata(client);
|
|
struct device_node *pp;
|
|
int gpio;
|
|
int r;
|
|
|
|
pp = client->dev.of_node;
|
|
if (!pp)
|
|
return -ENODEV;
|
|
|
|
/* Get GPIO from device tree */
|
|
gpio = of_get_named_gpio(pp, "enable-gpios", 0);
|
|
if (gpio < 0) {
|
|
nfc_err(&client->dev, "Failed to retrieve enable-gpios from device tree\n");
|
|
return gpio;
|
|
}
|
|
|
|
/* GPIO request and configuration */
|
|
r = devm_gpio_request_one(&client->dev, gpio, GPIOF_OUT_INIT_HIGH,
|
|
"clf_enable");
|
|
if (r) {
|
|
nfc_err(&client->dev, "Failed to request enable pin\n");
|
|
return r;
|
|
}
|
|
|
|
phy->gpio_ena = gpio;
|
|
|
|
phy->irq_polarity = irq_get_trigger_type(client->irq);
|
|
|
|
phy->se_status.is_ese_present =
|
|
of_property_read_bool(pp, "ese-present");
|
|
phy->se_status.is_uicc_present =
|
|
of_property_read_bool(pp, "uicc-present");
|
|
|
|
return 0;
|
|
}
|
|
#else
|
|
static int st21nfca_hci_i2c_of_request_resources(struct i2c_client *client)
|
|
{
|
|
return -ENODEV;
|
|
}
|
|
#endif
|
|
|
|
static int st21nfca_hci_i2c_request_resources(struct i2c_client *client)
|
|
{
|
|
struct st21nfca_nfc_platform_data *pdata;
|
|
struct st21nfca_i2c_phy *phy = i2c_get_clientdata(client);
|
|
int r;
|
|
|
|
pdata = client->dev.platform_data;
|
|
if (pdata == NULL) {
|
|
nfc_err(&client->dev, "No platform data\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* store for later use */
|
|
phy->gpio_ena = pdata->gpio_ena;
|
|
phy->irq_polarity = pdata->irq_polarity;
|
|
|
|
if (phy->gpio_ena > 0) {
|
|
r = devm_gpio_request_one(&client->dev, phy->gpio_ena,
|
|
GPIOF_OUT_INIT_HIGH, "clf_enable");
|
|
if (r) {
|
|
pr_err("%s : ena gpio_request failed\n", __FILE__);
|
|
return r;
|
|
}
|
|
}
|
|
|
|
phy->se_status.is_ese_present = pdata->is_ese_present;
|
|
phy->se_status.is_uicc_present = pdata->is_uicc_present;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int st21nfca_hci_i2c_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct st21nfca_i2c_phy *phy;
|
|
struct st21nfca_nfc_platform_data *pdata;
|
|
int r;
|
|
|
|
dev_dbg(&client->dev, "%s\n", __func__);
|
|
dev_dbg(&client->dev, "IRQ: %d\n", client->irq);
|
|
|
|
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
|
|
nfc_err(&client->dev, "Need I2C_FUNC_I2C\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
phy = devm_kzalloc(&client->dev, sizeof(struct st21nfca_i2c_phy),
|
|
GFP_KERNEL);
|
|
if (!phy)
|
|
return -ENOMEM;
|
|
|
|
phy->i2c_dev = client;
|
|
phy->pending_skb = alloc_skb(ST21NFCA_HCI_LLC_MAX_SIZE * 2, GFP_KERNEL);
|
|
if (phy->pending_skb == NULL)
|
|
return -ENOMEM;
|
|
|
|
phy->current_read_len = 0;
|
|
phy->crc_trials = 0;
|
|
mutex_init(&phy->phy_lock);
|
|
i2c_set_clientdata(client, phy);
|
|
|
|
pdata = client->dev.platform_data;
|
|
if (!pdata && client->dev.of_node) {
|
|
r = st21nfca_hci_i2c_of_request_resources(client);
|
|
if (r) {
|
|
nfc_err(&client->dev, "No platform data\n");
|
|
return r;
|
|
}
|
|
} else if (pdata) {
|
|
r = st21nfca_hci_i2c_request_resources(client);
|
|
if (r) {
|
|
nfc_err(&client->dev, "Cannot get platform resources\n");
|
|
return r;
|
|
}
|
|
} else {
|
|
nfc_err(&client->dev, "st21nfca platform resources not available\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
r = st21nfca_hci_platform_init(phy);
|
|
if (r < 0) {
|
|
nfc_err(&client->dev, "Unable to reboot st21nfca\n");
|
|
return r;
|
|
}
|
|
|
|
r = devm_request_threaded_irq(&client->dev, client->irq, NULL,
|
|
st21nfca_hci_irq_thread_fn,
|
|
phy->irq_polarity | IRQF_ONESHOT,
|
|
ST21NFCA_HCI_DRIVER_NAME, phy);
|
|
if (r < 0) {
|
|
nfc_err(&client->dev, "Unable to register IRQ handler\n");
|
|
return r;
|
|
}
|
|
|
|
return st21nfca_hci_probe(phy, &i2c_phy_ops, LLC_SHDLC_NAME,
|
|
ST21NFCA_FRAME_HEADROOM,
|
|
ST21NFCA_FRAME_TAILROOM,
|
|
ST21NFCA_HCI_LLC_MAX_PAYLOAD,
|
|
&phy->hdev,
|
|
&phy->se_status);
|
|
}
|
|
|
|
static int st21nfca_hci_i2c_remove(struct i2c_client *client)
|
|
{
|
|
struct st21nfca_i2c_phy *phy = i2c_get_clientdata(client);
|
|
|
|
dev_dbg(&client->dev, "%s\n", __func__);
|
|
|
|
st21nfca_hci_remove(phy->hdev);
|
|
|
|
if (phy->powered)
|
|
st21nfca_hci_i2c_disable(phy);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_OF
|
|
static const struct of_device_id of_st21nfca_i2c_match[] = {
|
|
{ .compatible = "st,st21nfca-i2c", },
|
|
{ .compatible = "st,st21nfca_i2c", },
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(of, of_st21nfca_i2c_match);
|
|
#endif
|
|
|
|
static struct i2c_driver st21nfca_hci_i2c_driver = {
|
|
.driver = {
|
|
.owner = THIS_MODULE,
|
|
.name = ST21NFCA_HCI_I2C_DRIVER_NAME,
|
|
.of_match_table = of_match_ptr(of_st21nfca_i2c_match),
|
|
},
|
|
.probe = st21nfca_hci_i2c_probe,
|
|
.id_table = st21nfca_hci_i2c_id_table,
|
|
.remove = st21nfca_hci_i2c_remove,
|
|
};
|
|
|
|
module_i2c_driver(st21nfca_hci_i2c_driver);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DESCRIPTION(DRIVER_DESC);
|