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8455dd0d4f
Add device tree node for the Secure Non-Volatile Storage (SNVS) on the VF610 platform. The SNVS block also has a Real Time Counter (RTC). Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
185 lines
3.2 KiB
Plaintext
185 lines
3.2 KiB
Plaintext
/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include "skeleton.dtsi"
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#include "vfxxx.dtsi"
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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a5_cpu: cpu@0 {
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compatible = "arm,cortex-a5";
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device_type = "cpu";
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reg = <0x0>;
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};
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};
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soc {
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interrupt-parent = <&intc>;
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aips-bus@40000000 {
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intc: interrupt-controller@40002000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x40003000 0x1000>,
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<0x40002100 0x100>;
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};
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global_timer: timer@40002200 {
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compatible = "arm,cortex-a9-global-timer";
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reg = <0x40002200 0x20>;
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interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_PLATFORM_BUS>;
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};
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};
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};
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};
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&adc0 {
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interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
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};
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&adc1 {
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interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
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};
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&can0 {
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interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
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};
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&can1 {
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interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
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};
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&dspi0 {
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interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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};
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&edma0 {
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interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "edma-tx", "edma-err";
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};
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&edma1 {
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interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "edma-tx", "edma-err";
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};
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&esdhc1 {
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interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
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};
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&fec0 {
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interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
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};
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&fec1 {
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interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
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};
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&ftm {
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interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
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};
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&gpio1 {
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interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
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};
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&gpio2 {
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interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
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};
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&gpio3 {
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interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
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};
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&gpio4 {
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interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
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};
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&gpio5 {
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interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
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};
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&i2c0 {
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interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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};
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&pit {
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interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
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};
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&qspi0 {
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interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
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};
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&sai2 {
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interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
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};
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&snvsrtc {
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interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
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};
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&src {
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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};
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&uart0 {
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interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
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};
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&uart1 {
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interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
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};
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&uart2 {
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interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
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};
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&uart3 {
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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};
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&uart4 {
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interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
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};
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&uart5 {
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interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
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};
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&usbdev0 {
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interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
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};
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&usbh1 {
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interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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};
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&usbphy0 {
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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};
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&usbphy1 {
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interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
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};
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&wdoga5 {
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interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
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status = "okay";
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};
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