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e9bf51e5cc
Inhibit the generation of __udivdi3 for the softfloat lib, use do_div() outright. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
931 lines
22 KiB
C
931 lines
22 KiB
C
/*
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* Floating point emulation support for subnormalised numbers on SH4
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* architecture This file is derived from the SoftFloat IEC/IEEE
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* Floating-point Arithmetic Package, Release 2 the original license of
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* which is reproduced below.
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*
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* ========================================================================
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*
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* This C source file is part of the SoftFloat IEC/IEEE Floating-point
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* Arithmetic Package, Release 2.
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*
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* Written by John R. Hauser. This work was made possible in part by the
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* International Computer Science Institute, located at Suite 600, 1947 Center
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* Street, Berkeley, California 94704. Funding was partially provided by the
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* National Science Foundation under grant MIP-9311980. The original version
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* of this code was written as part of a project to build a fixed-point vector
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* processor in collaboration with the University of California at Berkeley,
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* overseen by Profs. Nelson Morgan and John Wawrzynek. More information
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* is available through the web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
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* arithmetic/softfloat.html'.
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*
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* THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
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* has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
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* TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
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* PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
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* AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
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*
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* Derivative works are acceptable, even for commercial purposes, so long as
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* (1) they include prominent notice that the work is derivative, and (2) they
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* include prominent notice akin to these three paragraphs for those parts of
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* this code that are retained.
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*
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* ========================================================================
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*
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* SH4 modifications by Ismail Dhaoui <ismail.dhaoui@st.com>
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* and Kamel Khelifi <kamel.khelifi@st.com>
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*/
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#include <linux/kernel.h>
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#include <cpu/fpu.h>
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#include <asm/div64.h>
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#define LIT64( a ) a##LL
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typedef char flag;
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typedef unsigned char uint8;
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typedef signed char int8;
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typedef int uint16;
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typedef int int16;
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typedef unsigned int uint32;
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typedef signed int int32;
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typedef unsigned long long int bits64;
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typedef signed long long int sbits64;
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typedef unsigned char bits8;
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typedef signed char sbits8;
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typedef unsigned short int bits16;
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typedef signed short int sbits16;
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typedef unsigned int bits32;
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typedef signed int sbits32;
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typedef unsigned long long int uint64;
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typedef signed long long int int64;
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typedef unsigned long int float32;
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typedef unsigned long long float64;
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extern void float_raise(unsigned int flags); /* in fpu.c */
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extern int float_rounding_mode(void); /* in fpu.c */
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bits64 extractFloat64Frac(float64 a);
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flag extractFloat64Sign(float64 a);
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int16 extractFloat64Exp(float64 a);
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int16 extractFloat32Exp(float32 a);
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flag extractFloat32Sign(float32 a);
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bits32 extractFloat32Frac(float32 a);
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float64 packFloat64(flag zSign, int16 zExp, bits64 zSig);
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void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr);
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float32 packFloat32(flag zSign, int16 zExp, bits32 zSig);
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void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr);
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float64 float64_sub(float64 a, float64 b);
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float32 float32_sub(float32 a, float32 b);
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float32 float32_add(float32 a, float32 b);
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float64 float64_add(float64 a, float64 b);
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float64 float64_div(float64 a, float64 b);
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float32 float32_div(float32 a, float32 b);
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float32 float32_mul(float32 a, float32 b);
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float64 float64_mul(float64 a, float64 b);
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float32 float64_to_float32(float64 a);
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void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
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bits64 * z1Ptr);
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void sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
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bits64 * z1Ptr);
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void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr);
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static int8 countLeadingZeros32(bits32 a);
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static int8 countLeadingZeros64(bits64 a);
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static float64 normalizeRoundAndPackFloat64(flag zSign, int16 zExp,
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bits64 zSig);
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static float64 subFloat64Sigs(float64 a, float64 b, flag zSign);
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static float64 addFloat64Sigs(float64 a, float64 b, flag zSign);
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static float32 roundAndPackFloat32(flag zSign, int16 zExp, bits32 zSig);
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static float32 normalizeRoundAndPackFloat32(flag zSign, int16 zExp,
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bits32 zSig);
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static float64 roundAndPackFloat64(flag zSign, int16 zExp, bits64 zSig);
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static float32 subFloat32Sigs(float32 a, float32 b, flag zSign);
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static float32 addFloat32Sigs(float32 a, float32 b, flag zSign);
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static void normalizeFloat64Subnormal(bits64 aSig, int16 * zExpPtr,
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bits64 * zSigPtr);
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static bits64 estimateDiv128To64(bits64 a0, bits64 a1, bits64 b);
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static void normalizeFloat32Subnormal(bits32 aSig, int16 * zExpPtr,
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bits32 * zSigPtr);
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bits64 extractFloat64Frac(float64 a)
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{
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return a & LIT64(0x000FFFFFFFFFFFFF);
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}
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flag extractFloat64Sign(float64 a)
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{
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return a >> 63;
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}
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int16 extractFloat64Exp(float64 a)
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{
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return (a >> 52) & 0x7FF;
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}
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int16 extractFloat32Exp(float32 a)
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{
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return (a >> 23) & 0xFF;
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}
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flag extractFloat32Sign(float32 a)
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{
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return a >> 31;
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}
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bits32 extractFloat32Frac(float32 a)
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{
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return a & 0x007FFFFF;
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}
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float64 packFloat64(flag zSign, int16 zExp, bits64 zSig)
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{
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return (((bits64) zSign) << 63) + (((bits64) zExp) << 52) + zSig;
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}
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void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr)
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{
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bits64 z;
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if (count == 0) {
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z = a;
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} else if (count < 64) {
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z = (a >> count) | ((a << ((-count) & 63)) != 0);
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} else {
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z = (a != 0);
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}
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*zPtr = z;
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}
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static int8 countLeadingZeros32(bits32 a)
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{
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static const int8 countLeadingZerosHigh[] = {
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8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
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1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
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1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
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1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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};
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int8 shiftCount;
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shiftCount = 0;
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if (a < 0x10000) {
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shiftCount += 16;
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a <<= 16;
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}
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if (a < 0x1000000) {
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shiftCount += 8;
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a <<= 8;
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}
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shiftCount += countLeadingZerosHigh[a >> 24];
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return shiftCount;
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}
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static int8 countLeadingZeros64(bits64 a)
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{
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int8 shiftCount;
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shiftCount = 0;
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if (a < ((bits64) 1) << 32) {
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shiftCount += 32;
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} else {
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a >>= 32;
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}
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shiftCount += countLeadingZeros32(a);
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return shiftCount;
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}
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static float64 normalizeRoundAndPackFloat64(flag zSign, int16 zExp, bits64 zSig)
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{
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int8 shiftCount;
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shiftCount = countLeadingZeros64(zSig) - 1;
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return roundAndPackFloat64(zSign, zExp - shiftCount,
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zSig << shiftCount);
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}
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static float64 subFloat64Sigs(float64 a, float64 b, flag zSign)
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{
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int16 aExp, bExp, zExp;
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bits64 aSig, bSig, zSig;
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int16 expDiff;
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aSig = extractFloat64Frac(a);
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aExp = extractFloat64Exp(a);
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bSig = extractFloat64Frac(b);
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bExp = extractFloat64Exp(b);
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expDiff = aExp - bExp;
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aSig <<= 10;
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bSig <<= 10;
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if (0 < expDiff)
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goto aExpBigger;
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if (expDiff < 0)
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goto bExpBigger;
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if (aExp == 0) {
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aExp = 1;
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bExp = 1;
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}
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if (bSig < aSig)
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goto aBigger;
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if (aSig < bSig)
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goto bBigger;
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return packFloat64(float_rounding_mode() == FPSCR_RM_ZERO, 0, 0);
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bExpBigger:
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if (bExp == 0x7FF) {
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return packFloat64(zSign ^ 1, 0x7FF, 0);
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}
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if (aExp == 0) {
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++expDiff;
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} else {
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aSig |= LIT64(0x4000000000000000);
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}
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shift64RightJamming(aSig, -expDiff, &aSig);
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bSig |= LIT64(0x4000000000000000);
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bBigger:
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zSig = bSig - aSig;
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zExp = bExp;
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zSign ^= 1;
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goto normalizeRoundAndPack;
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aExpBigger:
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if (aExp == 0x7FF) {
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return a;
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}
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if (bExp == 0) {
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--expDiff;
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} else {
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bSig |= LIT64(0x4000000000000000);
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}
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shift64RightJamming(bSig, expDiff, &bSig);
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aSig |= LIT64(0x4000000000000000);
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aBigger:
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zSig = aSig - bSig;
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zExp = aExp;
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normalizeRoundAndPack:
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--zExp;
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return normalizeRoundAndPackFloat64(zSign, zExp, zSig);
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}
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static float64 addFloat64Sigs(float64 a, float64 b, flag zSign)
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{
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int16 aExp, bExp, zExp;
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bits64 aSig, bSig, zSig;
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int16 expDiff;
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aSig = extractFloat64Frac(a);
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aExp = extractFloat64Exp(a);
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bSig = extractFloat64Frac(b);
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bExp = extractFloat64Exp(b);
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expDiff = aExp - bExp;
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aSig <<= 9;
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bSig <<= 9;
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if (0 < expDiff) {
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if (aExp == 0x7FF) {
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return a;
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}
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if (bExp == 0) {
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--expDiff;
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} else {
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bSig |= LIT64(0x2000000000000000);
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}
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shift64RightJamming(bSig, expDiff, &bSig);
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zExp = aExp;
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} else if (expDiff < 0) {
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if (bExp == 0x7FF) {
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return packFloat64(zSign, 0x7FF, 0);
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}
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if (aExp == 0) {
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++expDiff;
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} else {
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aSig |= LIT64(0x2000000000000000);
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}
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shift64RightJamming(aSig, -expDiff, &aSig);
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zExp = bExp;
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} else {
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if (aExp == 0x7FF) {
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return a;
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}
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if (aExp == 0)
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return packFloat64(zSign, 0, (aSig + bSig) >> 9);
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zSig = LIT64(0x4000000000000000) + aSig + bSig;
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zExp = aExp;
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goto roundAndPack;
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}
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aSig |= LIT64(0x2000000000000000);
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zSig = (aSig + bSig) << 1;
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--zExp;
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if ((sbits64) zSig < 0) {
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zSig = aSig + bSig;
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++zExp;
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}
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roundAndPack:
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return roundAndPackFloat64(zSign, zExp, zSig);
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|
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}
|
|
|
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float32 packFloat32(flag zSign, int16 zExp, bits32 zSig)
|
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{
|
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return (((bits32) zSign) << 31) + (((bits32) zExp) << 23) + zSig;
|
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}
|
|
|
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void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr)
|
|
{
|
|
bits32 z;
|
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if (count == 0) {
|
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z = a;
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} else if (count < 32) {
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z = (a >> count) | ((a << ((-count) & 31)) != 0);
|
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} else {
|
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z = (a != 0);
|
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}
|
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*zPtr = z;
|
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}
|
|
|
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static float32 roundAndPackFloat32(flag zSign, int16 zExp, bits32 zSig)
|
|
{
|
|
flag roundNearestEven;
|
|
int8 roundIncrement, roundBits;
|
|
flag isTiny;
|
|
|
|
/* SH4 has only 2 rounding modes - round to nearest and round to zero */
|
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roundNearestEven = (float_rounding_mode() == FPSCR_RM_NEAREST);
|
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roundIncrement = 0x40;
|
|
if (!roundNearestEven) {
|
|
roundIncrement = 0;
|
|
}
|
|
roundBits = zSig & 0x7F;
|
|
if (0xFD <= (bits16) zExp) {
|
|
if ((0xFD < zExp)
|
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|| ((zExp == 0xFD)
|
|
&& ((sbits32) (zSig + roundIncrement) < 0))
|
|
) {
|
|
float_raise(FPSCR_CAUSE_OVERFLOW | FPSCR_CAUSE_INEXACT);
|
|
return packFloat32(zSign, 0xFF,
|
|
0) - (roundIncrement == 0);
|
|
}
|
|
if (zExp < 0) {
|
|
isTiny = (zExp < -1)
|
|
|| (zSig + roundIncrement < 0x80000000);
|
|
shift32RightJamming(zSig, -zExp, &zSig);
|
|
zExp = 0;
|
|
roundBits = zSig & 0x7F;
|
|
if (isTiny && roundBits)
|
|
float_raise(FPSCR_CAUSE_UNDERFLOW);
|
|
}
|
|
}
|
|
if (roundBits)
|
|
float_raise(FPSCR_CAUSE_INEXACT);
|
|
zSig = (zSig + roundIncrement) >> 7;
|
|
zSig &= ~(((roundBits ^ 0x40) == 0) & roundNearestEven);
|
|
if (zSig == 0)
|
|
zExp = 0;
|
|
return packFloat32(zSign, zExp, zSig);
|
|
|
|
}
|
|
|
|
static float32 normalizeRoundAndPackFloat32(flag zSign, int16 zExp, bits32 zSig)
|
|
{
|
|
int8 shiftCount;
|
|
|
|
shiftCount = countLeadingZeros32(zSig) - 1;
|
|
return roundAndPackFloat32(zSign, zExp - shiftCount,
|
|
zSig << shiftCount);
|
|
}
|
|
|
|
static float64 roundAndPackFloat64(flag zSign, int16 zExp, bits64 zSig)
|
|
{
|
|
flag roundNearestEven;
|
|
int16 roundIncrement, roundBits;
|
|
flag isTiny;
|
|
|
|
/* SH4 has only 2 rounding modes - round to nearest and round to zero */
|
|
roundNearestEven = (float_rounding_mode() == FPSCR_RM_NEAREST);
|
|
roundIncrement = 0x200;
|
|
if (!roundNearestEven) {
|
|
roundIncrement = 0;
|
|
}
|
|
roundBits = zSig & 0x3FF;
|
|
if (0x7FD <= (bits16) zExp) {
|
|
if ((0x7FD < zExp)
|
|
|| ((zExp == 0x7FD)
|
|
&& ((sbits64) (zSig + roundIncrement) < 0))
|
|
) {
|
|
float_raise(FPSCR_CAUSE_OVERFLOW | FPSCR_CAUSE_INEXACT);
|
|
return packFloat64(zSign, 0x7FF,
|
|
0) - (roundIncrement == 0);
|
|
}
|
|
if (zExp < 0) {
|
|
isTiny = (zExp < -1)
|
|
|| (zSig + roundIncrement <
|
|
LIT64(0x8000000000000000));
|
|
shift64RightJamming(zSig, -zExp, &zSig);
|
|
zExp = 0;
|
|
roundBits = zSig & 0x3FF;
|
|
if (isTiny && roundBits)
|
|
float_raise(FPSCR_CAUSE_UNDERFLOW);
|
|
}
|
|
}
|
|
if (roundBits)
|
|
float_raise(FPSCR_CAUSE_INEXACT);
|
|
zSig = (zSig + roundIncrement) >> 10;
|
|
zSig &= ~(((roundBits ^ 0x200) == 0) & roundNearestEven);
|
|
if (zSig == 0)
|
|
zExp = 0;
|
|
return packFloat64(zSign, zExp, zSig);
|
|
|
|
}
|
|
|
|
static float32 subFloat32Sigs(float32 a, float32 b, flag zSign)
|
|
{
|
|
int16 aExp, bExp, zExp;
|
|
bits32 aSig, bSig, zSig;
|
|
int16 expDiff;
|
|
|
|
aSig = extractFloat32Frac(a);
|
|
aExp = extractFloat32Exp(a);
|
|
bSig = extractFloat32Frac(b);
|
|
bExp = extractFloat32Exp(b);
|
|
expDiff = aExp - bExp;
|
|
aSig <<= 7;
|
|
bSig <<= 7;
|
|
if (0 < expDiff)
|
|
goto aExpBigger;
|
|
if (expDiff < 0)
|
|
goto bExpBigger;
|
|
if (aExp == 0) {
|
|
aExp = 1;
|
|
bExp = 1;
|
|
}
|
|
if (bSig < aSig)
|
|
goto aBigger;
|
|
if (aSig < bSig)
|
|
goto bBigger;
|
|
return packFloat32(float_rounding_mode() == FPSCR_RM_ZERO, 0, 0);
|
|
bExpBigger:
|
|
if (bExp == 0xFF) {
|
|
return packFloat32(zSign ^ 1, 0xFF, 0);
|
|
}
|
|
if (aExp == 0) {
|
|
++expDiff;
|
|
} else {
|
|
aSig |= 0x40000000;
|
|
}
|
|
shift32RightJamming(aSig, -expDiff, &aSig);
|
|
bSig |= 0x40000000;
|
|
bBigger:
|
|
zSig = bSig - aSig;
|
|
zExp = bExp;
|
|
zSign ^= 1;
|
|
goto normalizeRoundAndPack;
|
|
aExpBigger:
|
|
if (aExp == 0xFF) {
|
|
return a;
|
|
}
|
|
if (bExp == 0) {
|
|
--expDiff;
|
|
} else {
|
|
bSig |= 0x40000000;
|
|
}
|
|
shift32RightJamming(bSig, expDiff, &bSig);
|
|
aSig |= 0x40000000;
|
|
aBigger:
|
|
zSig = aSig - bSig;
|
|
zExp = aExp;
|
|
normalizeRoundAndPack:
|
|
--zExp;
|
|
return normalizeRoundAndPackFloat32(zSign, zExp, zSig);
|
|
|
|
}
|
|
|
|
static float32 addFloat32Sigs(float32 a, float32 b, flag zSign)
|
|
{
|
|
int16 aExp, bExp, zExp;
|
|
bits32 aSig, bSig, zSig;
|
|
int16 expDiff;
|
|
|
|
aSig = extractFloat32Frac(a);
|
|
aExp = extractFloat32Exp(a);
|
|
bSig = extractFloat32Frac(b);
|
|
bExp = extractFloat32Exp(b);
|
|
expDiff = aExp - bExp;
|
|
aSig <<= 6;
|
|
bSig <<= 6;
|
|
if (0 < expDiff) {
|
|
if (aExp == 0xFF) {
|
|
return a;
|
|
}
|
|
if (bExp == 0) {
|
|
--expDiff;
|
|
} else {
|
|
bSig |= 0x20000000;
|
|
}
|
|
shift32RightJamming(bSig, expDiff, &bSig);
|
|
zExp = aExp;
|
|
} else if (expDiff < 0) {
|
|
if (bExp == 0xFF) {
|
|
return packFloat32(zSign, 0xFF, 0);
|
|
}
|
|
if (aExp == 0) {
|
|
++expDiff;
|
|
} else {
|
|
aSig |= 0x20000000;
|
|
}
|
|
shift32RightJamming(aSig, -expDiff, &aSig);
|
|
zExp = bExp;
|
|
} else {
|
|
if (aExp == 0xFF) {
|
|
return a;
|
|
}
|
|
if (aExp == 0)
|
|
return packFloat32(zSign, 0, (aSig + bSig) >> 6);
|
|
zSig = 0x40000000 + aSig + bSig;
|
|
zExp = aExp;
|
|
goto roundAndPack;
|
|
}
|
|
aSig |= 0x20000000;
|
|
zSig = (aSig + bSig) << 1;
|
|
--zExp;
|
|
if ((sbits32) zSig < 0) {
|
|
zSig = aSig + bSig;
|
|
++zExp;
|
|
}
|
|
roundAndPack:
|
|
return roundAndPackFloat32(zSign, zExp, zSig);
|
|
|
|
}
|
|
|
|
float64 float64_sub(float64 a, float64 b)
|
|
{
|
|
flag aSign, bSign;
|
|
|
|
aSign = extractFloat64Sign(a);
|
|
bSign = extractFloat64Sign(b);
|
|
if (aSign == bSign) {
|
|
return subFloat64Sigs(a, b, aSign);
|
|
} else {
|
|
return addFloat64Sigs(a, b, aSign);
|
|
}
|
|
|
|
}
|
|
|
|
float32 float32_sub(float32 a, float32 b)
|
|
{
|
|
flag aSign, bSign;
|
|
|
|
aSign = extractFloat32Sign(a);
|
|
bSign = extractFloat32Sign(b);
|
|
if (aSign == bSign) {
|
|
return subFloat32Sigs(a, b, aSign);
|
|
} else {
|
|
return addFloat32Sigs(a, b, aSign);
|
|
}
|
|
|
|
}
|
|
|
|
float32 float32_add(float32 a, float32 b)
|
|
{
|
|
flag aSign, bSign;
|
|
|
|
aSign = extractFloat32Sign(a);
|
|
bSign = extractFloat32Sign(b);
|
|
if (aSign == bSign) {
|
|
return addFloat32Sigs(a, b, aSign);
|
|
} else {
|
|
return subFloat32Sigs(a, b, aSign);
|
|
}
|
|
|
|
}
|
|
|
|
float64 float64_add(float64 a, float64 b)
|
|
{
|
|
flag aSign, bSign;
|
|
|
|
aSign = extractFloat64Sign(a);
|
|
bSign = extractFloat64Sign(b);
|
|
if (aSign == bSign) {
|
|
return addFloat64Sigs(a, b, aSign);
|
|
} else {
|
|
return subFloat64Sigs(a, b, aSign);
|
|
}
|
|
}
|
|
|
|
static void
|
|
normalizeFloat64Subnormal(bits64 aSig, int16 * zExpPtr, bits64 * zSigPtr)
|
|
{
|
|
int8 shiftCount;
|
|
|
|
shiftCount = countLeadingZeros64(aSig) - 11;
|
|
*zSigPtr = aSig << shiftCount;
|
|
*zExpPtr = 1 - shiftCount;
|
|
}
|
|
|
|
void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
|
|
bits64 * z1Ptr)
|
|
{
|
|
bits64 z1;
|
|
|
|
z1 = a1 + b1;
|
|
*z1Ptr = z1;
|
|
*z0Ptr = a0 + b0 + (z1 < a1);
|
|
}
|
|
|
|
void
|
|
sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
|
|
bits64 * z1Ptr)
|
|
{
|
|
*z1Ptr = a1 - b1;
|
|
*z0Ptr = a0 - b0 - (a1 < b1);
|
|
}
|
|
|
|
static bits64 estimateDiv128To64(bits64 a0, bits64 a1, bits64 b)
|
|
{
|
|
bits64 b0, b1;
|
|
bits64 rem0, rem1, term0, term1;
|
|
bits64 z, tmp;
|
|
if (b <= a0)
|
|
return LIT64(0xFFFFFFFFFFFFFFFF);
|
|
b0 = b >> 32;
|
|
tmp = a0;
|
|
do_div(tmp, b0);
|
|
|
|
z = (b0 << 32 <= a0) ? LIT64(0xFFFFFFFF00000000) : tmp << 32;
|
|
mul64To128(b, z, &term0, &term1);
|
|
sub128(a0, a1, term0, term1, &rem0, &rem1);
|
|
while (((sbits64) rem0) < 0) {
|
|
z -= LIT64(0x100000000);
|
|
b1 = b << 32;
|
|
add128(rem0, rem1, b0, b1, &rem0, &rem1);
|
|
}
|
|
rem0 = (rem0 << 32) | (rem1 >> 32);
|
|
tmp = rem0;
|
|
do_div(tmp, b0);
|
|
z |= (b0 << 32 <= rem0) ? 0xFFFFFFFF : tmp;
|
|
return z;
|
|
}
|
|
|
|
void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr)
|
|
{
|
|
bits32 aHigh, aLow, bHigh, bLow;
|
|
bits64 z0, zMiddleA, zMiddleB, z1;
|
|
|
|
aLow = a;
|
|
aHigh = a >> 32;
|
|
bLow = b;
|
|
bHigh = b >> 32;
|
|
z1 = ((bits64) aLow) * bLow;
|
|
zMiddleA = ((bits64) aLow) * bHigh;
|
|
zMiddleB = ((bits64) aHigh) * bLow;
|
|
z0 = ((bits64) aHigh) * bHigh;
|
|
zMiddleA += zMiddleB;
|
|
z0 += (((bits64) (zMiddleA < zMiddleB)) << 32) + (zMiddleA >> 32);
|
|
zMiddleA <<= 32;
|
|
z1 += zMiddleA;
|
|
z0 += (z1 < zMiddleA);
|
|
*z1Ptr = z1;
|
|
*z0Ptr = z0;
|
|
|
|
}
|
|
|
|
static void normalizeFloat32Subnormal(bits32 aSig, int16 * zExpPtr,
|
|
bits32 * zSigPtr)
|
|
{
|
|
int8 shiftCount;
|
|
|
|
shiftCount = countLeadingZeros32(aSig) - 8;
|
|
*zSigPtr = aSig << shiftCount;
|
|
*zExpPtr = 1 - shiftCount;
|
|
|
|
}
|
|
|
|
float64 float64_div(float64 a, float64 b)
|
|
{
|
|
flag aSign, bSign, zSign;
|
|
int16 aExp, bExp, zExp;
|
|
bits64 aSig, bSig, zSig;
|
|
bits64 rem0, rem1;
|
|
bits64 term0, term1;
|
|
|
|
aSig = extractFloat64Frac(a);
|
|
aExp = extractFloat64Exp(a);
|
|
aSign = extractFloat64Sign(a);
|
|
bSig = extractFloat64Frac(b);
|
|
bExp = extractFloat64Exp(b);
|
|
bSign = extractFloat64Sign(b);
|
|
zSign = aSign ^ bSign;
|
|
if (aExp == 0x7FF) {
|
|
if (bExp == 0x7FF) {
|
|
}
|
|
return packFloat64(zSign, 0x7FF, 0);
|
|
}
|
|
if (bExp == 0x7FF) {
|
|
return packFloat64(zSign, 0, 0);
|
|
}
|
|
if (bExp == 0) {
|
|
if (bSig == 0) {
|
|
if ((aExp | aSig) == 0) {
|
|
float_raise(FPSCR_CAUSE_INVALID);
|
|
}
|
|
return packFloat64(zSign, 0x7FF, 0);
|
|
}
|
|
normalizeFloat64Subnormal(bSig, &bExp, &bSig);
|
|
}
|
|
if (aExp == 0) {
|
|
if (aSig == 0)
|
|
return packFloat64(zSign, 0, 0);
|
|
normalizeFloat64Subnormal(aSig, &aExp, &aSig);
|
|
}
|
|
zExp = aExp - bExp + 0x3FD;
|
|
aSig = (aSig | LIT64(0x0010000000000000)) << 10;
|
|
bSig = (bSig | LIT64(0x0010000000000000)) << 11;
|
|
if (bSig <= (aSig + aSig)) {
|
|
aSig >>= 1;
|
|
++zExp;
|
|
}
|
|
zSig = estimateDiv128To64(aSig, 0, bSig);
|
|
if ((zSig & 0x1FF) <= 2) {
|
|
mul64To128(bSig, zSig, &term0, &term1);
|
|
sub128(aSig, 0, term0, term1, &rem0, &rem1);
|
|
while ((sbits64) rem0 < 0) {
|
|
--zSig;
|
|
add128(rem0, rem1, 0, bSig, &rem0, &rem1);
|
|
}
|
|
zSig |= (rem1 != 0);
|
|
}
|
|
return roundAndPackFloat64(zSign, zExp, zSig);
|
|
|
|
}
|
|
|
|
float32 float32_div(float32 a, float32 b)
|
|
{
|
|
flag aSign, bSign, zSign;
|
|
int16 aExp, bExp, zExp;
|
|
bits32 aSig, bSig;
|
|
uint64_t zSig;
|
|
|
|
aSig = extractFloat32Frac(a);
|
|
aExp = extractFloat32Exp(a);
|
|
aSign = extractFloat32Sign(a);
|
|
bSig = extractFloat32Frac(b);
|
|
bExp = extractFloat32Exp(b);
|
|
bSign = extractFloat32Sign(b);
|
|
zSign = aSign ^ bSign;
|
|
if (aExp == 0xFF) {
|
|
if (bExp == 0xFF) {
|
|
}
|
|
return packFloat32(zSign, 0xFF, 0);
|
|
}
|
|
if (bExp == 0xFF) {
|
|
return packFloat32(zSign, 0, 0);
|
|
}
|
|
if (bExp == 0) {
|
|
if (bSig == 0) {
|
|
return packFloat32(zSign, 0xFF, 0);
|
|
}
|
|
normalizeFloat32Subnormal(bSig, &bExp, &bSig);
|
|
}
|
|
if (aExp == 0) {
|
|
if (aSig == 0)
|
|
return packFloat32(zSign, 0, 0);
|
|
normalizeFloat32Subnormal(aSig, &aExp, &aSig);
|
|
}
|
|
zExp = aExp - bExp + 0x7D;
|
|
aSig = (aSig | 0x00800000) << 7;
|
|
bSig = (bSig | 0x00800000) << 8;
|
|
if (bSig <= (aSig + aSig)) {
|
|
aSig >>= 1;
|
|
++zExp;
|
|
}
|
|
zSig = (((bits64) aSig) << 32);
|
|
do_div(zSig, bSig);
|
|
|
|
if ((zSig & 0x3F) == 0) {
|
|
zSig |= (((bits64) bSig) * zSig != ((bits64) aSig) << 32);
|
|
}
|
|
return roundAndPackFloat32(zSign, zExp, (bits32)zSig);
|
|
|
|
}
|
|
|
|
float32 float32_mul(float32 a, float32 b)
|
|
{
|
|
char aSign, bSign, zSign;
|
|
int aExp, bExp, zExp;
|
|
unsigned int aSig, bSig;
|
|
unsigned long long zSig64;
|
|
unsigned int zSig;
|
|
|
|
aSig = extractFloat32Frac(a);
|
|
aExp = extractFloat32Exp(a);
|
|
aSign = extractFloat32Sign(a);
|
|
bSig = extractFloat32Frac(b);
|
|
bExp = extractFloat32Exp(b);
|
|
bSign = extractFloat32Sign(b);
|
|
zSign = aSign ^ bSign;
|
|
if (aExp == 0) {
|
|
if (aSig == 0)
|
|
return packFloat32(zSign, 0, 0);
|
|
normalizeFloat32Subnormal(aSig, &aExp, &aSig);
|
|
}
|
|
if (bExp == 0) {
|
|
if (bSig == 0)
|
|
return packFloat32(zSign, 0, 0);
|
|
normalizeFloat32Subnormal(bSig, &bExp, &bSig);
|
|
}
|
|
if ((bExp == 0xff && bSig == 0) || (aExp == 0xff && aSig == 0))
|
|
return roundAndPackFloat32(zSign, 0xff, 0);
|
|
|
|
zExp = aExp + bExp - 0x7F;
|
|
aSig = (aSig | 0x00800000) << 7;
|
|
bSig = (bSig | 0x00800000) << 8;
|
|
shift64RightJamming(((unsigned long long)aSig) * bSig, 32, &zSig64);
|
|
zSig = zSig64;
|
|
if (0 <= (signed int)(zSig << 1)) {
|
|
zSig <<= 1;
|
|
--zExp;
|
|
}
|
|
return roundAndPackFloat32(zSign, zExp, zSig);
|
|
|
|
}
|
|
|
|
float64 float64_mul(float64 a, float64 b)
|
|
{
|
|
char aSign, bSign, zSign;
|
|
int aExp, bExp, zExp;
|
|
unsigned long long int aSig, bSig, zSig0, zSig1;
|
|
|
|
aSig = extractFloat64Frac(a);
|
|
aExp = extractFloat64Exp(a);
|
|
aSign = extractFloat64Sign(a);
|
|
bSig = extractFloat64Frac(b);
|
|
bExp = extractFloat64Exp(b);
|
|
bSign = extractFloat64Sign(b);
|
|
zSign = aSign ^ bSign;
|
|
|
|
if (aExp == 0) {
|
|
if (aSig == 0)
|
|
return packFloat64(zSign, 0, 0);
|
|
normalizeFloat64Subnormal(aSig, &aExp, &aSig);
|
|
}
|
|
if (bExp == 0) {
|
|
if (bSig == 0)
|
|
return packFloat64(zSign, 0, 0);
|
|
normalizeFloat64Subnormal(bSig, &bExp, &bSig);
|
|
}
|
|
if ((aExp == 0x7ff && aSig == 0) || (bExp == 0x7ff && bSig == 0))
|
|
return roundAndPackFloat64(zSign, 0x7ff, 0);
|
|
|
|
zExp = aExp + bExp - 0x3FF;
|
|
aSig = (aSig | 0x0010000000000000LL) << 10;
|
|
bSig = (bSig | 0x0010000000000000LL) << 11;
|
|
mul64To128(aSig, bSig, &zSig0, &zSig1);
|
|
zSig0 |= (zSig1 != 0);
|
|
if (0 <= (signed long long int)(zSig0 << 1)) {
|
|
zSig0 <<= 1;
|
|
--zExp;
|
|
}
|
|
return roundAndPackFloat64(zSign, zExp, zSig0);
|
|
}
|
|
|
|
/*
|
|
* -------------------------------------------------------------------------------
|
|
* Returns the result of converting the double-precision floating-point value
|
|
* `a' to the single-precision floating-point format. The conversion is
|
|
* performed according to the IEC/IEEE Standard for Binary Floating-point
|
|
* Arithmetic.
|
|
* -------------------------------------------------------------------------------
|
|
* */
|
|
float32 float64_to_float32(float64 a)
|
|
{
|
|
flag aSign;
|
|
int16 aExp;
|
|
bits64 aSig;
|
|
bits32 zSig;
|
|
|
|
aSig = extractFloat64Frac( a );
|
|
aExp = extractFloat64Exp( a );
|
|
aSign = extractFloat64Sign( a );
|
|
|
|
shift64RightJamming( aSig, 22, &aSig );
|
|
zSig = aSig;
|
|
if ( aExp || zSig ) {
|
|
zSig |= 0x40000000;
|
|
aExp -= 0x381;
|
|
}
|
|
return roundAndPackFloat32(aSign, aExp, zSig);
|
|
}
|