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61c8c158c8
Patch from Nicolas Pitre It used to make a difference in the gcc-2.95 era. However these days modern gcc apparently got better at not being influenced by such constructs (which is good in general) and therefore such workaround is of no real advantage anymore. The good news is that gcc (from version 4.1.0) is now fixed with regards to the defficiency this workaround was trying to address. For those interested the patch can easily be backported to older gcc versions and can be found here: http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/arm.c.diff?r1=1.476&r2=1.478 and also here: http://savannah.gnu.org/cgi-bin/viewcvs/gcc/gcc/gcc/config/arm/arm.c.diff?r1=text&tr1=1.476&r2=text&tr2=1.478&diff_format=u Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
84 lines
2.2 KiB
C
84 lines
2.2 KiB
C
/*
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* linux/include/asm-arm/arch-pxa/hardware.h
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*
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* Author: Nicolas Pitre
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* Created: Jun 15, 2001
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* Copyright: MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H
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/*
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* We requires absolute addresses.
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*/
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#define PCIO_BASE 0
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/*
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* Workarounds for at least 2 errata so far require this.
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* The mapping is set in mach-pxa/generic.c.
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*/
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#define UNCACHED_PHYS_0 0xff000000
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#define UNCACHED_ADDR UNCACHED_PHYS_0
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/*
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* Intel PXA2xx internal register mapping:
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*
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* 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff
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* 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff
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* 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff
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* 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff
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* 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff
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* 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff
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* 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff
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*
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* Note that not all PXA2xx chips implement all those addresses, and the
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* kernel only maps the minimum needed range of this mapping.
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*/
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#define io_p2v(x) (0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
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#define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
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#ifndef __ASSEMBLY__
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# define __REG(x) (*((volatile unsigned long *)io_p2v(x)))
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/* With indexed regs we don't want to feed the index through io_p2v()
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especially if it is a variable, otherwise horrible code will result. */
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# define __REG2(x,y) \
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(*(volatile unsigned long *)((unsigned long)&__REG(x) + (y)))
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# define __PREG(x) (io_v2p((u32)&(x)))
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#else
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# define __REG(x) io_p2v(x)
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# define __PREG(x) io_v2p(x)
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#endif
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#ifndef __ASSEMBLY__
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/*
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* Handy routine to set GPIO alternate functions
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*/
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extern void pxa_gpio_mode( int gpio_mode );
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/*
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* Routine to enable or disable CKEN
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*/
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extern void pxa_set_cken(int clock, int enable);
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/*
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* return current memory and LCD clock frequency in units of 10kHz
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*/
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extern unsigned int get_memclk_frequency_10khz(void);
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extern unsigned int get_lcdclk_frequency_10khz(void);
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#endif
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#endif /* _ASM_ARCH_HARDWARE_H */
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