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c808d3d839
Rename the "Mac ESP" irq as "ESP" to be consistent with all the other Mac drivers and ESP drivers. Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
642 lines
16 KiB
C
642 lines
16 KiB
C
/* mac_esp.c: ESP front-end for Macintosh Quadra systems.
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*
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* Adapted from jazz_esp.c and the old mac_esp.c.
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*
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* The pseudo DMA algorithm is based on the one used in NetBSD.
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* See sys/arch/mac68k/obio/esp.c for some background information.
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*
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* Copyright (C) 2007-2008 Finn Thain
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/scatterlist.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/nubus.h>
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#include <linux/slab.h>
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#include <asm/irq.h>
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#include <asm/dma.h>
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#include <asm/macints.h>
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#include <asm/macintosh.h>
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#include <asm/mac_via.h>
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#include <scsi/scsi_host.h>
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#include "esp_scsi.h"
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#define DRV_MODULE_NAME "mac_esp"
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#define PFX DRV_MODULE_NAME ": "
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#define DRV_VERSION "1.000"
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#define DRV_MODULE_RELDATE "Sept 15, 2007"
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#define MAC_ESP_IO_BASE 0x50F00000
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#define MAC_ESP_REGS_QUADRA (MAC_ESP_IO_BASE + 0x10000)
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#define MAC_ESP_REGS_QUADRA2 (MAC_ESP_IO_BASE + 0xF000)
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#define MAC_ESP_REGS_QUADRA3 (MAC_ESP_IO_BASE + 0x18000)
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#define MAC_ESP_REGS_SPACING 0x402
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#define MAC_ESP_PDMA_REG 0xF9800024
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#define MAC_ESP_PDMA_REG_SPACING 0x4
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#define MAC_ESP_PDMA_IO_OFFSET 0x100
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#define esp_read8(REG) mac_esp_read8(esp, REG)
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#define esp_write8(VAL, REG) mac_esp_write8(esp, VAL, REG)
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struct mac_esp_priv {
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struct esp *esp;
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void __iomem *pdma_regs;
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void __iomem *pdma_io;
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int error;
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};
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static struct esp *esp_chips[2];
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#define MAC_ESP_GET_PRIV(esp) ((struct mac_esp_priv *) \
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platform_get_drvdata((struct platform_device *) \
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(esp->dev)))
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static inline void mac_esp_write8(struct esp *esp, u8 val, unsigned long reg)
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{
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nubus_writeb(val, esp->regs + reg * 16);
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}
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static inline u8 mac_esp_read8(struct esp *esp, unsigned long reg)
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{
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return nubus_readb(esp->regs + reg * 16);
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}
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/* For pseudo DMA and PIO we need the virtual address
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* so this address mapping is the identity mapping.
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*/
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static dma_addr_t mac_esp_map_single(struct esp *esp, void *buf,
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size_t sz, int dir)
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{
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return (dma_addr_t)buf;
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}
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static int mac_esp_map_sg(struct esp *esp, struct scatterlist *sg,
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int num_sg, int dir)
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{
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int i;
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for (i = 0; i < num_sg; i++)
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sg[i].dma_address = (u32)sg_virt(&sg[i]);
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return num_sg;
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}
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static void mac_esp_unmap_single(struct esp *esp, dma_addr_t addr,
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size_t sz, int dir)
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{
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/* Nothing to do. */
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}
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static void mac_esp_unmap_sg(struct esp *esp, struct scatterlist *sg,
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int num_sg, int dir)
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{
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/* Nothing to do. */
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}
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static void mac_esp_reset_dma(struct esp *esp)
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{
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/* Nothing to do. */
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}
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static void mac_esp_dma_drain(struct esp *esp)
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{
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/* Nothing to do. */
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}
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static void mac_esp_dma_invalidate(struct esp *esp)
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{
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/* Nothing to do. */
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}
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static int mac_esp_dma_error(struct esp *esp)
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{
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return MAC_ESP_GET_PRIV(esp)->error;
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}
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static inline int mac_esp_wait_for_empty_fifo(struct esp *esp)
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{
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struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
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int i = 500000;
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do {
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if (!(esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES))
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return 0;
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if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
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return 1;
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udelay(2);
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} while (--i);
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printk(KERN_ERR PFX "FIFO is not empty (sreg %02x)\n",
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esp_read8(ESP_STATUS));
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mep->error = 1;
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return 1;
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}
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static inline int mac_esp_wait_for_dreq(struct esp *esp)
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{
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struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
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int i = 500000;
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do {
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if (mep->pdma_regs == NULL) {
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if (via2_scsi_drq_pending())
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return 0;
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} else {
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if (nubus_readl(mep->pdma_regs) & 0x200)
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return 0;
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}
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if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
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return 1;
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udelay(2);
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} while (--i);
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printk(KERN_ERR PFX "PDMA timeout (sreg %02x)\n",
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esp_read8(ESP_STATUS));
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mep->error = 1;
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return 1;
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}
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#define MAC_ESP_PDMA_LOOP(operands) \
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asm volatile ( \
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" tstw %1 \n" \
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" jbeq 20f \n" \
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"1: movew " operands " \n" \
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"2: movew " operands " \n" \
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"3: movew " operands " \n" \
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"4: movew " operands " \n" \
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"5: movew " operands " \n" \
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"6: movew " operands " \n" \
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"7: movew " operands " \n" \
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"8: movew " operands " \n" \
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"9: movew " operands " \n" \
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"10: movew " operands " \n" \
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"11: movew " operands " \n" \
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"12: movew " operands " \n" \
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"13: movew " operands " \n" \
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"14: movew " operands " \n" \
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"15: movew " operands " \n" \
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"16: movew " operands " \n" \
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" subqw #1,%1 \n" \
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" jbne 1b \n" \
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"20: tstw %2 \n" \
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" jbeq 30f \n" \
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"21: movew " operands " \n" \
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" subqw #1,%2 \n" \
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" jbne 21b \n" \
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"30: tstw %3 \n" \
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" jbeq 40f \n" \
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"31: moveb " operands " \n" \
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"32: nop \n" \
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"40: \n" \
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" \n" \
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" .section __ex_table,\"a\" \n" \
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" .align 4 \n" \
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" .long 1b,40b \n" \
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" .long 2b,40b \n" \
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" .long 3b,40b \n" \
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" .long 4b,40b \n" \
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" .long 5b,40b \n" \
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" .long 6b,40b \n" \
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" .long 7b,40b \n" \
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" .long 8b,40b \n" \
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" .long 9b,40b \n" \
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" .long 10b,40b \n" \
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" .long 11b,40b \n" \
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" .long 12b,40b \n" \
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" .long 13b,40b \n" \
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" .long 14b,40b \n" \
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" .long 15b,40b \n" \
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" .long 16b,40b \n" \
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" .long 21b,40b \n" \
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" .long 31b,40b \n" \
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" .long 32b,40b \n" \
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" .previous \n" \
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: "+a" (addr), "+r" (count32), "+r" (count2) \
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: "g" (count1), "a" (mep->pdma_io))
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static void mac_esp_send_pdma_cmd(struct esp *esp, u32 addr, u32 esp_count,
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u32 dma_count, int write, u8 cmd)
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{
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struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
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mep->error = 0;
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if (!write)
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scsi_esp_cmd(esp, ESP_CMD_FLUSH);
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esp_write8((esp_count >> 0) & 0xFF, ESP_TCLOW);
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esp_write8((esp_count >> 8) & 0xFF, ESP_TCMED);
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scsi_esp_cmd(esp, cmd);
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do {
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unsigned int count32 = esp_count >> 5;
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unsigned int count2 = (esp_count & 0x1F) >> 1;
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unsigned int count1 = esp_count & 1;
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unsigned int start_addr = addr;
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if (mac_esp_wait_for_dreq(esp))
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break;
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if (write) {
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MAC_ESP_PDMA_LOOP("%4@,%0@+");
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esp_count -= addr - start_addr;
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} else {
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unsigned int n;
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MAC_ESP_PDMA_LOOP("%0@+,%4@");
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if (mac_esp_wait_for_empty_fifo(esp))
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break;
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n = (esp_read8(ESP_TCMED) << 8) + esp_read8(ESP_TCLOW);
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addr = start_addr + esp_count - n;
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esp_count = n;
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}
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} while (esp_count);
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}
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/*
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* Programmed IO routines follow.
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*/
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static inline unsigned int mac_esp_wait_for_fifo(struct esp *esp)
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{
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int i = 500000;
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do {
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unsigned int fbytes = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
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if (fbytes)
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return fbytes;
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udelay(2);
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} while (--i);
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printk(KERN_ERR PFX "FIFO is empty (sreg %02x)\n",
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esp_read8(ESP_STATUS));
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return 0;
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}
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static inline int mac_esp_wait_for_intr(struct esp *esp)
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{
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struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
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int i = 500000;
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do {
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esp->sreg = esp_read8(ESP_STATUS);
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if (esp->sreg & ESP_STAT_INTR)
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return 0;
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udelay(2);
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} while (--i);
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printk(KERN_ERR PFX "IRQ timeout (sreg %02x)\n", esp->sreg);
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mep->error = 1;
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return 1;
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}
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#define MAC_ESP_PIO_LOOP(operands, reg1) \
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asm volatile ( \
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"1: moveb " operands " \n" \
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" subqw #1,%1 \n" \
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" jbne 1b \n" \
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: "+a" (addr), "+r" (reg1) \
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: "a" (fifo))
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#define MAC_ESP_PIO_FILL(operands, reg1) \
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asm volatile ( \
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" moveb " operands " \n" \
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" moveb " operands " \n" \
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" moveb " operands " \n" \
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" moveb " operands " \n" \
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" moveb " operands " \n" \
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" moveb " operands " \n" \
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" moveb " operands " \n" \
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" moveb " operands " \n" \
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" moveb " operands " \n" \
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" moveb " operands " \n" \
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" moveb " operands " \n" \
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" moveb " operands " \n" \
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" moveb " operands " \n" \
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" moveb " operands " \n" \
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" moveb " operands " \n" \
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" moveb " operands " \n" \
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" subqw #8,%1 \n" \
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" subqw #8,%1 \n" \
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: "+a" (addr), "+r" (reg1) \
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: "a" (fifo))
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#define MAC_ESP_FIFO_SIZE 16
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static void mac_esp_send_pio_cmd(struct esp *esp, u32 addr, u32 esp_count,
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u32 dma_count, int write, u8 cmd)
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{
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struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
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u8 *fifo = esp->regs + ESP_FDATA * 16;
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cmd &= ~ESP_CMD_DMA;
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mep->error = 0;
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if (write) {
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scsi_esp_cmd(esp, cmd);
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while (1) {
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unsigned int n;
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n = mac_esp_wait_for_fifo(esp);
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if (!n)
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break;
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if (n > esp_count)
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n = esp_count;
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esp_count -= n;
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MAC_ESP_PIO_LOOP("%2@,%0@+", n);
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if (!esp_count)
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break;
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if (mac_esp_wait_for_intr(esp))
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break;
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if (((esp->sreg & ESP_STAT_PMASK) != ESP_DIP) &&
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((esp->sreg & ESP_STAT_PMASK) != ESP_MIP))
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break;
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esp->ireg = esp_read8(ESP_INTRPT);
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if ((esp->ireg & (ESP_INTR_DC | ESP_INTR_BSERV)) !=
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ESP_INTR_BSERV)
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break;
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scsi_esp_cmd(esp, ESP_CMD_TI);
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}
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} else {
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scsi_esp_cmd(esp, ESP_CMD_FLUSH);
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if (esp_count >= MAC_ESP_FIFO_SIZE)
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MAC_ESP_PIO_FILL("%0@+,%2@", esp_count);
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else
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MAC_ESP_PIO_LOOP("%0@+,%2@", esp_count);
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scsi_esp_cmd(esp, cmd);
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while (esp_count) {
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unsigned int n;
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if (mac_esp_wait_for_intr(esp))
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break;
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if (((esp->sreg & ESP_STAT_PMASK) != ESP_DOP) &&
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((esp->sreg & ESP_STAT_PMASK) != ESP_MOP))
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break;
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esp->ireg = esp_read8(ESP_INTRPT);
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if ((esp->ireg & (ESP_INTR_DC | ESP_INTR_BSERV)) !=
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ESP_INTR_BSERV)
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break;
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n = MAC_ESP_FIFO_SIZE -
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(esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES);
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if (n > esp_count)
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n = esp_count;
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if (n == MAC_ESP_FIFO_SIZE) {
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MAC_ESP_PIO_FILL("%0@+,%2@", esp_count);
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} else {
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esp_count -= n;
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MAC_ESP_PIO_LOOP("%0@+,%2@", n);
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}
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scsi_esp_cmd(esp, ESP_CMD_TI);
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}
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}
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}
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static int mac_esp_irq_pending(struct esp *esp)
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{
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if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
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return 1;
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return 0;
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}
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static u32 mac_esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
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{
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return dma_len > 0xFFFF ? 0xFFFF : dma_len;
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}
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static irqreturn_t mac_scsi_esp_intr(int irq, void *dev_id)
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{
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int got_intr;
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/*
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* This is an edge triggered IRQ, so we have to be careful to
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* avoid missing a transition when it is shared by two ESP devices.
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*/
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do {
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got_intr = 0;
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if (esp_chips[0] &&
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(mac_esp_read8(esp_chips[0], ESP_STATUS) & ESP_STAT_INTR)) {
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(void)scsi_esp_intr(irq, esp_chips[0]);
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got_intr = 1;
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}
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if (esp_chips[1] &&
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(mac_esp_read8(esp_chips[1], ESP_STATUS) & ESP_STAT_INTR)) {
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(void)scsi_esp_intr(irq, esp_chips[1]);
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got_intr = 1;
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}
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} while (got_intr);
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return IRQ_HANDLED;
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}
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static struct esp_driver_ops mac_esp_ops = {
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.esp_write8 = mac_esp_write8,
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.esp_read8 = mac_esp_read8,
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.map_single = mac_esp_map_single,
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.map_sg = mac_esp_map_sg,
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.unmap_single = mac_esp_unmap_single,
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.unmap_sg = mac_esp_unmap_sg,
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.irq_pending = mac_esp_irq_pending,
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.dma_length_limit = mac_esp_dma_length_limit,
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.reset_dma = mac_esp_reset_dma,
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.dma_drain = mac_esp_dma_drain,
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.dma_invalidate = mac_esp_dma_invalidate,
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.send_dma_cmd = mac_esp_send_pdma_cmd,
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.dma_error = mac_esp_dma_error,
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};
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static int __devinit esp_mac_probe(struct platform_device *dev)
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{
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struct scsi_host_template *tpnt = &scsi_esp_template;
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struct Scsi_Host *host;
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struct esp *esp;
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int err;
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struct mac_esp_priv *mep;
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if (!MACH_IS_MAC)
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return -ENODEV;
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if (dev->id > 1)
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return -ENODEV;
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host = scsi_host_alloc(tpnt, sizeof(struct esp));
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err = -ENOMEM;
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if (!host)
|
|
goto fail;
|
|
|
|
host->max_id = 8;
|
|
host->use_clustering = DISABLE_CLUSTERING;
|
|
esp = shost_priv(host);
|
|
|
|
esp->host = host;
|
|
esp->dev = dev;
|
|
|
|
esp->command_block = kzalloc(16, GFP_KERNEL);
|
|
if (!esp->command_block)
|
|
goto fail_unlink;
|
|
esp->command_block_dma = (dma_addr_t)esp->command_block;
|
|
|
|
esp->scsi_id = 7;
|
|
host->this_id = esp->scsi_id;
|
|
esp->scsi_id_mask = 1 << esp->scsi_id;
|
|
|
|
mep = kzalloc(sizeof(struct mac_esp_priv), GFP_KERNEL);
|
|
if (!mep)
|
|
goto fail_free_command_block;
|
|
mep->esp = esp;
|
|
platform_set_drvdata(dev, mep);
|
|
|
|
switch (macintosh_config->scsi_type) {
|
|
case MAC_SCSI_QUADRA:
|
|
esp->cfreq = 16500000;
|
|
esp->regs = (void __iomem *)MAC_ESP_REGS_QUADRA;
|
|
mep->pdma_io = esp->regs + MAC_ESP_PDMA_IO_OFFSET;
|
|
mep->pdma_regs = NULL;
|
|
break;
|
|
case MAC_SCSI_QUADRA2:
|
|
esp->cfreq = 25000000;
|
|
esp->regs = (void __iomem *)(MAC_ESP_REGS_QUADRA2 +
|
|
dev->id * MAC_ESP_REGS_SPACING);
|
|
mep->pdma_io = esp->regs + MAC_ESP_PDMA_IO_OFFSET;
|
|
mep->pdma_regs = (void __iomem *)(MAC_ESP_PDMA_REG +
|
|
dev->id * MAC_ESP_PDMA_REG_SPACING);
|
|
nubus_writel(0x1d1, mep->pdma_regs);
|
|
break;
|
|
case MAC_SCSI_QUADRA3:
|
|
/* These quadras have a real DMA controller (the PSC) but we
|
|
* don't know how to drive it so we must use PIO instead.
|
|
*/
|
|
esp->cfreq = 25000000;
|
|
esp->regs = (void __iomem *)MAC_ESP_REGS_QUADRA3;
|
|
mep->pdma_io = NULL;
|
|
mep->pdma_regs = NULL;
|
|
break;
|
|
}
|
|
|
|
esp->ops = &mac_esp_ops;
|
|
if (mep->pdma_io == NULL) {
|
|
printk(KERN_INFO PFX "using PIO for controller %d\n", dev->id);
|
|
esp_write8(0, ESP_TCLOW);
|
|
esp_write8(0, ESP_TCMED);
|
|
esp->flags = ESP_FLAG_DISABLE_SYNC;
|
|
mac_esp_ops.send_dma_cmd = mac_esp_send_pio_cmd;
|
|
} else {
|
|
printk(KERN_INFO PFX "using PDMA for controller %d\n", dev->id);
|
|
}
|
|
|
|
host->irq = IRQ_MAC_SCSI;
|
|
esp_chips[dev->id] = esp;
|
|
mb();
|
|
if (esp_chips[!dev->id] == NULL) {
|
|
err = request_irq(host->irq, mac_scsi_esp_intr, 0, "ESP", NULL);
|
|
if (err < 0) {
|
|
esp_chips[dev->id] = NULL;
|
|
goto fail_free_priv;
|
|
}
|
|
}
|
|
|
|
err = scsi_esp_register(esp, &dev->dev);
|
|
if (err)
|
|
goto fail_free_irq;
|
|
|
|
return 0;
|
|
|
|
fail_free_irq:
|
|
if (esp_chips[!dev->id] == NULL)
|
|
free_irq(host->irq, esp);
|
|
fail_free_priv:
|
|
kfree(mep);
|
|
fail_free_command_block:
|
|
kfree(esp->command_block);
|
|
fail_unlink:
|
|
scsi_host_put(host);
|
|
fail:
|
|
return err;
|
|
}
|
|
|
|
static int __devexit esp_mac_remove(struct platform_device *dev)
|
|
{
|
|
struct mac_esp_priv *mep = platform_get_drvdata(dev);
|
|
struct esp *esp = mep->esp;
|
|
unsigned int irq = esp->host->irq;
|
|
|
|
scsi_esp_unregister(esp);
|
|
|
|
esp_chips[dev->id] = NULL;
|
|
if (!(esp_chips[0] || esp_chips[1]))
|
|
free_irq(irq, NULL);
|
|
|
|
kfree(mep);
|
|
|
|
kfree(esp->command_block);
|
|
|
|
scsi_host_put(esp->host);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver esp_mac_driver = {
|
|
.probe = esp_mac_probe,
|
|
.remove = __devexit_p(esp_mac_remove),
|
|
.driver = {
|
|
.name = DRV_MODULE_NAME,
|
|
.owner = THIS_MODULE,
|
|
},
|
|
};
|
|
|
|
static int __init mac_esp_init(void)
|
|
{
|
|
return platform_driver_register(&esp_mac_driver);
|
|
}
|
|
|
|
static void __exit mac_esp_exit(void)
|
|
{
|
|
platform_driver_unregister(&esp_mac_driver);
|
|
}
|
|
|
|
MODULE_DESCRIPTION("Mac ESP SCSI driver");
|
|
MODULE_AUTHOR("Finn Thain <fthain@telegraphics.com.au>");
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_VERSION(DRV_VERSION);
|
|
MODULE_ALIAS("platform:" DRV_MODULE_NAME);
|
|
|
|
module_init(mac_esp_init);
|
|
module_exit(mac_esp_exit);
|