Krish Sadhukhan 75d1cc0e05 x86/mm/pat: Don't flush cache if hardware enforces cache coherency across encryption domnains ... In some hardware implementations, coherency between the encrypted and unencrypted mappings of the same physical page is enforced. In such a system, it is not required for software to flush the page from all CPU caches in the system prior to changing the value of the C-bit for the page. So check that bit before flushing the cache. [ bp: Massage commit message. ] Suggested-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20200917212038.5090-3-krish.sadhukhan@oracle.com		2020-09-18 10:47:00 +02:00
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cpa-test.c	mm: don't include asm/pgtable.h if linux/mm.h is already included	2020-06-09 09:39:13 -07:00
Makefile
memtype_interval.c	mm: reorder includes after introduction of linux/pgtable.h	2020-06-09 09:39:13 -07:00
memtype.c	mm: don't include asm/pgtable.h if linux/mm.h is already included	2020-06-09 09:39:13 -07:00
memtype.h
set_memory.c	x86/mm/pat: Don't flush cache if hardware enforces cache coherency across encryption domnains	2020-09-18 10:47:00 +02:00