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246f74bb11
platform_get_resource_byname() and devm_ioremap_resource() can be replaced by devm_platform_ioremap_resource_byname(), which can simplify the code logic a bit, No functional change here. Signed-off-by: Zhang Zekun <zhangzekun11@huawei.com> Link: https://lore.kernel.org/r/20230810131650.71916-1-zhangzekun11@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
153 lines
3.7 KiB
C
153 lines
3.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright 2016 Broadcom Limited
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*/
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "spi-bcm-qspi.h"
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#define INTR_BASE_BIT_SHIFT 0x02
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#define INTR_COUNT 0x07
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struct bcm_iproc_intc {
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struct bcm_qspi_soc_intc soc_intc;
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struct platform_device *pdev;
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void __iomem *int_reg;
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void __iomem *int_status_reg;
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spinlock_t soclock;
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bool big_endian;
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};
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static u32 bcm_iproc_qspi_get_l2_int_status(struct bcm_qspi_soc_intc *soc_intc)
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{
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struct bcm_iproc_intc *priv =
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container_of(soc_intc, struct bcm_iproc_intc, soc_intc);
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void __iomem *mmio = priv->int_status_reg;
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int i;
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u32 val = 0, sts = 0;
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for (i = 0; i < INTR_COUNT; i++) {
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if (bcm_qspi_readl(priv->big_endian, mmio + (i * 4)))
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val |= 1UL << i;
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}
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if (val & INTR_MSPI_DONE_MASK)
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sts |= MSPI_DONE;
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if (val & BSPI_LR_INTERRUPTS_ALL)
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sts |= BSPI_DONE;
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if (val & BSPI_LR_INTERRUPTS_ERROR)
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sts |= BSPI_ERR;
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return sts;
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}
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static void bcm_iproc_qspi_int_ack(struct bcm_qspi_soc_intc *soc_intc, int type)
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{
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struct bcm_iproc_intc *priv =
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container_of(soc_intc, struct bcm_iproc_intc, soc_intc);
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void __iomem *mmio = priv->int_status_reg;
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u32 mask = get_qspi_mask(type);
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int i;
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for (i = 0; i < INTR_COUNT; i++) {
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if (mask & (1UL << i))
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bcm_qspi_writel(priv->big_endian, 1, mmio + (i * 4));
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}
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}
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static void bcm_iproc_qspi_int_set(struct bcm_qspi_soc_intc *soc_intc, int type,
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bool en)
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{
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struct bcm_iproc_intc *priv =
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container_of(soc_intc, struct bcm_iproc_intc, soc_intc);
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void __iomem *mmio = priv->int_reg;
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u32 mask = get_qspi_mask(type);
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u32 val;
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unsigned long flags;
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spin_lock_irqsave(&priv->soclock, flags);
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val = bcm_qspi_readl(priv->big_endian, mmio);
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if (en)
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val = val | (mask << INTR_BASE_BIT_SHIFT);
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else
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val = val & ~(mask << INTR_BASE_BIT_SHIFT);
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bcm_qspi_writel(priv->big_endian, val, mmio);
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spin_unlock_irqrestore(&priv->soclock, flags);
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}
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static int bcm_iproc_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct bcm_iproc_intc *priv;
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struct bcm_qspi_soc_intc *soc_intc;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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soc_intc = &priv->soc_intc;
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priv->pdev = pdev;
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spin_lock_init(&priv->soclock);
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priv->int_reg = devm_platform_ioremap_resource_byname(pdev, "intr_regs");
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if (IS_ERR(priv->int_reg))
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return PTR_ERR(priv->int_reg);
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priv->int_status_reg = devm_platform_ioremap_resource_byname(pdev,
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"intr_status_reg");
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if (IS_ERR(priv->int_status_reg))
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return PTR_ERR(priv->int_status_reg);
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priv->big_endian = of_device_is_big_endian(dev->of_node);
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bcm_iproc_qspi_int_ack(soc_intc, MSPI_BSPI_DONE);
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bcm_iproc_qspi_int_set(soc_intc, MSPI_BSPI_DONE, false);
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soc_intc->bcm_qspi_int_ack = bcm_iproc_qspi_int_ack;
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soc_intc->bcm_qspi_int_set = bcm_iproc_qspi_int_set;
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soc_intc->bcm_qspi_get_int_status = bcm_iproc_qspi_get_l2_int_status;
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return bcm_qspi_probe(pdev, soc_intc);
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}
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static void bcm_iproc_remove(struct platform_device *pdev)
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{
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bcm_qspi_remove(pdev);
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}
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static const struct of_device_id bcm_iproc_of_match[] = {
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{ .compatible = "brcm,spi-nsp-qspi" },
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{ .compatible = "brcm,spi-ns2-qspi" },
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{},
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};
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MODULE_DEVICE_TABLE(of, bcm_iproc_of_match);
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static struct platform_driver bcm_iproc_driver = {
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.probe = bcm_iproc_probe,
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.remove_new = bcm_iproc_remove,
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.driver = {
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.name = "bcm_iproc",
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.pm = &bcm_qspi_pm_ops,
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.of_match_table = bcm_iproc_of_match,
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}
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};
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module_platform_driver(bcm_iproc_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Kamal Dasu");
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MODULE_DESCRIPTION("SPI flash driver for Broadcom iProc SoCs");
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