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3f9bce7a22
If we are using edge IRQs, new samples can arrive while processing current interrupt since there are no hw guarantees the irq line stays "low" long enough to properly detect the new interrupt. In this case the new sample will be missed. Polling FIFO status register in st_lsm6dsx_handler_thread routine allow us to read new samples even if the interrupt arrives while processing previous data and the timeslot where the line is "low" is too short to be properly detected. Fixes: |
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| .. | ||
| bmi160 | ||
| inv_icm42600 | ||
| inv_mpu6050 | ||
| st_lsm6dsx | ||
| adis16400.c | ||
| adis16460.c | ||
| adis16475.c | ||
| adis16480.c | ||
| adis_buffer.c | ||
| adis_trigger.c | ||
| adis.c | ||
| fxos8700_core.c | ||
| fxos8700_i2c.c | ||
| fxos8700_spi.c | ||
| fxos8700.h | ||
| Kconfig | ||
| kmx61.c | ||
| Makefile | ||