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fced80c735
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
320 lines
6.1 KiB
C
320 lines
6.1 KiB
C
/*
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* TI DaVinci clock config file
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*
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* Copyright (C) 2006 Texas Instruments.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/mutex.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <mach/psc.h>
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#include "clock.h"
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/* PLL/Reset register offsets */
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#define PLLM 0x110
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static LIST_HEAD(clocks);
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static DEFINE_MUTEX(clocks_mutex);
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static DEFINE_SPINLOCK(clockfw_lock);
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static unsigned int commonrate;
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static unsigned int armrate;
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static unsigned int fixedrate = 27000000; /* 27 MHZ */
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extern void davinci_psc_config(unsigned int domain, unsigned int id, char enable);
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/*
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* Returns a clock. Note that we first try to use device id on the bus
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* and clock name. If this fails, we try to use clock name only.
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*/
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struct clk *clk_get(struct device *dev, const char *id)
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{
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struct clk *p, *clk = ERR_PTR(-ENOENT);
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int idno;
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if (dev == NULL || dev->bus != &platform_bus_type)
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idno = -1;
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else
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idno = to_platform_device(dev)->id;
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mutex_lock(&clocks_mutex);
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list_for_each_entry(p, &clocks, node) {
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if (p->id == idno &&
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strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
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clk = p;
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goto found;
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}
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}
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list_for_each_entry(p, &clocks, node) {
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if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
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clk = p;
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break;
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}
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}
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found:
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mutex_unlock(&clocks_mutex);
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return clk;
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}
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EXPORT_SYMBOL(clk_get);
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void clk_put(struct clk *clk)
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{
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if (clk && !IS_ERR(clk))
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module_put(clk->owner);
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}
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EXPORT_SYMBOL(clk_put);
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static int __clk_enable(struct clk *clk)
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{
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if (clk->flags & ALWAYS_ENABLED)
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return 0;
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davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, clk->lpsc, 1);
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return 0;
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}
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static void __clk_disable(struct clk *clk)
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{
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if (clk->usecount)
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return;
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davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, clk->lpsc, 0);
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}
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int clk_enable(struct clk *clk)
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{
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unsigned long flags;
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int ret = 0;
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if (clk == NULL || IS_ERR(clk))
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return -EINVAL;
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if (clk->usecount++ == 0) {
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spin_lock_irqsave(&clockfw_lock, flags);
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ret = __clk_enable(clk);
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spin_unlock_irqrestore(&clockfw_lock, flags);
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}
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return ret;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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unsigned long flags;
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if (clk == NULL || IS_ERR(clk))
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return;
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if (clk->usecount > 0 && !(--clk->usecount)) {
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spin_lock_irqsave(&clockfw_lock, flags);
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__clk_disable(clk);
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spin_unlock_irqrestore(&clockfw_lock, flags);
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}
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}
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EXPORT_SYMBOL(clk_disable);
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unsigned long clk_get_rate(struct clk *clk)
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{
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if (clk == NULL || IS_ERR(clk))
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return -EINVAL;
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return *(clk->rate);
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}
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EXPORT_SYMBOL(clk_get_rate);
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long clk_round_rate(struct clk *clk, unsigned long rate)
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{
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if (clk == NULL || IS_ERR(clk))
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return -EINVAL;
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return *(clk->rate);
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}
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EXPORT_SYMBOL(clk_round_rate);
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int clk_set_rate(struct clk *clk, unsigned long rate)
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{
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if (clk == NULL || IS_ERR(clk))
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return -EINVAL;
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/* changing the clk rate is not supported */
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return -EINVAL;
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}
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EXPORT_SYMBOL(clk_set_rate);
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int clk_register(struct clk *clk)
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{
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if (clk == NULL || IS_ERR(clk))
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return -EINVAL;
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mutex_lock(&clocks_mutex);
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list_add(&clk->node, &clocks);
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mutex_unlock(&clocks_mutex);
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return 0;
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}
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EXPORT_SYMBOL(clk_register);
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void clk_unregister(struct clk *clk)
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{
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if (clk == NULL || IS_ERR(clk))
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return;
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mutex_lock(&clocks_mutex);
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list_del(&clk->node);
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mutex_unlock(&clocks_mutex);
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}
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EXPORT_SYMBOL(clk_unregister);
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static struct clk davinci_clks[] = {
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{
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.name = "ARMCLK",
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.rate = &armrate,
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.lpsc = -1,
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.flags = ALWAYS_ENABLED,
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},
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{
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.name = "UART",
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.rate = &fixedrate,
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.lpsc = DAVINCI_LPSC_UART0,
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},
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{
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.name = "EMACCLK",
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.rate = &commonrate,
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.lpsc = DAVINCI_LPSC_EMAC_WRAPPER,
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},
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{
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.name = "I2CCLK",
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.rate = &fixedrate,
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.lpsc = DAVINCI_LPSC_I2C,
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},
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{
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.name = "IDECLK",
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.rate = &commonrate,
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.lpsc = DAVINCI_LPSC_ATA,
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},
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{
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.name = "McBSPCLK",
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.rate = &commonrate,
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.lpsc = DAVINCI_LPSC_McBSP,
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},
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{
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.name = "MMCSDCLK",
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.rate = &commonrate,
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.lpsc = DAVINCI_LPSC_MMC_SD,
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},
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{
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.name = "SPICLK",
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.rate = &commonrate,
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.lpsc = DAVINCI_LPSC_SPI,
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},
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{
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.name = "gpio",
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.rate = &commonrate,
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.lpsc = DAVINCI_LPSC_GPIO,
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},
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{
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.name = "AEMIFCLK",
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.rate = &commonrate,
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.lpsc = DAVINCI_LPSC_AEMIF,
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.usecount = 1,
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}
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};
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int __init davinci_clk_init(void)
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{
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struct clk *clkp;
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int count = 0;
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u32 pll_mult;
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pll_mult = davinci_readl(DAVINCI_PLL_CNTRL0_BASE + PLLM);
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commonrate = ((pll_mult + 1) * 27000000) / 6;
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armrate = ((pll_mult + 1) * 27000000) / 2;
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for (clkp = davinci_clks; count < ARRAY_SIZE(davinci_clks);
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count++, clkp++) {
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clk_register(clkp);
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/* Turn on clocks that have been enabled in the
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* table above */
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if (clkp->usecount)
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clk_enable(clkp);
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}
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return 0;
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}
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#ifdef CONFIG_PROC_FS
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#include <linux/proc_fs.h>
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#include <linux/seq_file.h>
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static void *davinci_ck_start(struct seq_file *m, loff_t *pos)
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{
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return *pos < 1 ? (void *)1 : NULL;
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}
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static void *davinci_ck_next(struct seq_file *m, void *v, loff_t *pos)
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{
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++*pos;
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return NULL;
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}
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static void davinci_ck_stop(struct seq_file *m, void *v)
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{
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}
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static int davinci_ck_show(struct seq_file *m, void *v)
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{
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struct clk *cp;
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list_for_each_entry(cp, &clocks, node)
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seq_printf(m,"%s %d %d\n", cp->name, *(cp->rate), cp->usecount);
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return 0;
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}
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static const struct seq_operations davinci_ck_op = {
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.start = davinci_ck_start,
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.next = davinci_ck_next,
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.stop = davinci_ck_stop,
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.show = davinci_ck_show
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};
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static int davinci_ck_open(struct inode *inode, struct file *file)
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{
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return seq_open(file, &davinci_ck_op);
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}
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static const struct file_operations proc_davinci_ck_operations = {
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.open = davinci_ck_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = seq_release,
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};
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static int __init davinci_ck_proc_init(void)
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{
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proc_create("davinci_clocks", 0, NULL, &proc_davinci_ck_operations);
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return 0;
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}
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__initcall(davinci_ck_proc_init);
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#endif /* CONFIG_DEBUG_PROC_FS */
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