Heiko Stuebner f0684c1a83 phy/rockchip: inno-dsidphy: generalize parameter handling ... During review it came to light that exposing the pll clock outside is not the right approach and struct phy_configure_opts_mipi_dphy exists just for that reason to transfer parameters to the phy. So drop the exposed clock and rely on the phy configure options to bring in the correct rate. That way we can also just drop the open coded timing struct and default values function. Fixes: b7535a3bc0 ("phy/rockchip: Add support for Innosilicon MIPI/LVDS/TTL PHY") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>		2020-01-08 12:58:06 +05:30
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Kconfig	phy/rockchip: inno-dsidphy: generalize parameter handling	2020-01-08 12:58:06 +05:30
Makefile	phy/rockchip: Add support for Innosilicon MIPI/LVDS/TTL PHY	2019-10-31 16:54:00 +05:30
phy-rockchip-dp.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 178	2019-05-30 11:29:19 -07:00
phy-rockchip-emmc.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 235	2019-06-19 17:09:07 +02:00
phy-rockchip-inno-dsidphy.c	phy/rockchip: inno-dsidphy: generalize parameter handling	2020-01-08 12:58:06 +05:30
phy-rockchip-inno-hdmi.c	phy-rockchip-inno-hdmi: Fix RK3328_TERM_RESISTOR_CALIB_SPEED_7_0's third value	2019-08-27 11:36:36 +05:30
phy-rockchip-inno-usb2.c	phy: phy-rockchip-inno-usb2: add phy description for px30	2019-10-31 18:27:47 +05:30
phy-rockchip-pcie.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 235	2019-06-19 17:09:07 +02:00
phy-rockchip-typec.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282	2019-06-05 17:36:37 +02:00
phy-rockchip-usb.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 235	2019-06-19 17:09:07 +02:00