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291f7856fc
Add initial pin control support for the R-Car V4M (R8A779H0) SoC, including bias, drive strength and voltage control. Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> [geert: Fixes and cleanups] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/5f59263e75be713dc954007cfeb2c99274c9d761.1706264667.git.geert+renesas@glider.be
69 lines
3.3 KiB
Makefile
69 lines
3.3 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_PINCTRL_SH_PFC) += core.o pinctrl.o
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obj-$(CONFIG_PINCTRL_SH_PFC_GPIO) += gpio.o
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obj-$(CONFIG_PINCTRL_PFC_EMEV2) += pfc-emev2.o
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obj-$(CONFIG_PINCTRL_PFC_R8A73A4) += pfc-r8a73a4.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7740) += pfc-r8a7740.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7742) += pfc-r8a7790.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7743) += pfc-r8a7791.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7744) += pfc-r8a7791.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7745) += pfc-r8a7794.o
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obj-$(CONFIG_PINCTRL_PFC_R8A77470) += pfc-r8a77470.o
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obj-$(CONFIG_PINCTRL_PFC_R8A774A1) += pfc-r8a7796.o
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obj-$(CONFIG_PINCTRL_PFC_R8A774B1) += pfc-r8a77965.o
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obj-$(CONFIG_PINCTRL_PFC_R8A774C0) += pfc-r8a77990.o
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obj-$(CONFIG_PINCTRL_PFC_R8A774E1) += pfc-r8a77951.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7778) += pfc-r8a7778.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7779) += pfc-r8a7779.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc-r8a7791.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7792) += pfc-r8a7792.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7793) += pfc-r8a7791.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7794) += pfc-r8a7794.o
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obj-$(CONFIG_PINCTRL_PFC_R8A77951) += pfc-r8a77951.o
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obj-$(CONFIG_PINCTRL_PFC_R8A77960) += pfc-r8a7796.o
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obj-$(CONFIG_PINCTRL_PFC_R8A77961) += pfc-r8a7796.o
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obj-$(CONFIG_PINCTRL_PFC_R8A77965) += pfc-r8a77965.o
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obj-$(CONFIG_PINCTRL_PFC_R8A77970) += pfc-r8a77970.o
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obj-$(CONFIG_PINCTRL_PFC_R8A77980) += pfc-r8a77980.o
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obj-$(CONFIG_PINCTRL_PFC_R8A77990) += pfc-r8a77990.o
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obj-$(CONFIG_PINCTRL_PFC_R8A77995) += pfc-r8a77995.o
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obj-$(CONFIG_PINCTRL_PFC_R8A779A0) += pfc-r8a779a0.o
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obj-$(CONFIG_PINCTRL_PFC_R8A779F0) += pfc-r8a779f0.o
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obj-$(CONFIG_PINCTRL_PFC_R8A779G0) += pfc-r8a779g0.o
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obj-$(CONFIG_PINCTRL_PFC_R8A779H0) += pfc-r8a779h0.o
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obj-$(CONFIG_PINCTRL_PFC_SH7203) += pfc-sh7203.o
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obj-$(CONFIG_PINCTRL_PFC_SH7264) += pfc-sh7264.o
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obj-$(CONFIG_PINCTRL_PFC_SH7269) += pfc-sh7269.o
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obj-$(CONFIG_PINCTRL_PFC_SH73A0) += pfc-sh73a0.o
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obj-$(CONFIG_PINCTRL_PFC_SH7720) += pfc-sh7720.o
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obj-$(CONFIG_PINCTRL_PFC_SH7722) += pfc-sh7722.o
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obj-$(CONFIG_PINCTRL_PFC_SH7723) += pfc-sh7723.o
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obj-$(CONFIG_PINCTRL_PFC_SH7724) += pfc-sh7724.o
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obj-$(CONFIG_PINCTRL_PFC_SH7734) += pfc-sh7734.o
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obj-$(CONFIG_PINCTRL_PFC_SH7757) += pfc-sh7757.o
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obj-$(CONFIG_PINCTRL_PFC_SH7785) += pfc-sh7785.o
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obj-$(CONFIG_PINCTRL_PFC_SH7786) += pfc-sh7786.o
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obj-$(CONFIG_PINCTRL_PFC_SHX3) += pfc-shx3.o
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obj-$(CONFIG_PINCTRL_RZA1) += pinctrl-rza1.o
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obj-$(CONFIG_PINCTRL_RZA2) += pinctrl-rza2.o
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obj-$(CONFIG_PINCTRL_RZG2L) += pinctrl-rzg2l.o
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obj-$(CONFIG_PINCTRL_RZN1) += pinctrl-rzn1.o
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obj-$(CONFIG_PINCTRL_RZV2M) += pinctrl-rzv2m.o
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ifeq ($(CONFIG_COMPILE_TEST),y)
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CFLAGS_pfc-sh7203.o += -I$(srctree)/arch/sh/include/cpu-sh2a
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CFLAGS_pfc-sh7264.o += -I$(srctree)/arch/sh/include/cpu-sh2a
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CFLAGS_pfc-sh7269.o += -I$(srctree)/arch/sh/include/cpu-sh2a
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CFLAGS_pfc-sh7720.o += -I$(srctree)/arch/sh/include/cpu-sh3
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CFLAGS_pfc-sh7722.o += -I$(srctree)/arch/sh/include/cpu-sh4
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CFLAGS_pfc-sh7723.o += -I$(srctree)/arch/sh/include/cpu-sh4
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CFLAGS_pfc-sh7724.o += -I$(srctree)/arch/sh/include/cpu-sh4
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CFLAGS_pfc-sh7734.o += -I$(srctree)/arch/sh/include/cpu-sh4
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CFLAGS_pfc-sh7757.o += -I$(srctree)/arch/sh/include/cpu-sh4
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CFLAGS_pfc-sh7785.o += -I$(srctree)/arch/sh/include/cpu-sh4
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CFLAGS_pfc-sh7786.o += -I$(srctree)/arch/sh/include/cpu-sh4
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CFLAGS_pfc-shx3.o += -I$(srctree)/arch/sh/include/cpu-sh4
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endif
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