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3ecbf05be1
Versatile Express platform has an elaborated configuration system, consisting of microcontrollers residing on the mother- and daughterboards known as Motherboard/Daughterboard Configuration Controller (MCC and DCC). The controllers are responsible for the platform initialization (reset generation, flash programming, FPGA bitfiles loading etc.) but also control clock generators, voltage regulators, gather environmental data like temperature, power consumption etc. Even the video output switch (FPGA) is controlled that way. Those devices are _not_ visible in the main address space and the usual communication channel uses some kind of a bridge in the peripheral block sending commands (requests) to the controllers and receiving responses. It can take up to 500 microseconds for a transaction to be completed, therefore it is important to provide a non-blocking interface to it. This patch adds an abstraction of this infrastructure. Bridge drivers can register themselves with the framework. Then, a driver of a device can request an abstract "function" - the request will be redirected to a bridge referred by thedd "arm,vexpress,config-bridge" property of the device tree node. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
278 lines
6.7 KiB
C
278 lines
6.7 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Copyright (C) 2012 ARM Limited
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*/
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#define pr_fmt(fmt) "vexpress-config: " fmt
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#include <linux/bitops.h>
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#include <linux/completion.h>
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#include <linux/export.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/vexpress.h>
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#define VEXPRESS_CONFIG_MAX_BRIDGES 2
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struct vexpress_config_bridge {
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struct device_node *node;
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struct vexpress_config_bridge_info *info;
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struct list_head transactions;
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spinlock_t transactions_lock;
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} vexpress_config_bridges[VEXPRESS_CONFIG_MAX_BRIDGES];
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static DECLARE_BITMAP(vexpress_config_bridges_map,
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ARRAY_SIZE(vexpress_config_bridges));
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static DEFINE_MUTEX(vexpress_config_bridges_mutex);
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struct vexpress_config_bridge *vexpress_config_bridge_register(
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struct device_node *node,
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struct vexpress_config_bridge_info *info)
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{
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struct vexpress_config_bridge *bridge;
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int i;
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pr_debug("Registering bridge '%s'\n", info->name);
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mutex_lock(&vexpress_config_bridges_mutex);
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i = find_first_zero_bit(vexpress_config_bridges_map,
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ARRAY_SIZE(vexpress_config_bridges));
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if (i >= ARRAY_SIZE(vexpress_config_bridges)) {
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pr_err("Can't register more bridges!\n");
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mutex_unlock(&vexpress_config_bridges_mutex);
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return NULL;
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}
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__set_bit(i, vexpress_config_bridges_map);
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bridge = &vexpress_config_bridges[i];
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bridge->node = node;
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bridge->info = info;
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INIT_LIST_HEAD(&bridge->transactions);
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spin_lock_init(&bridge->transactions_lock);
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mutex_unlock(&vexpress_config_bridges_mutex);
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return bridge;
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}
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void vexpress_config_bridge_unregister(struct vexpress_config_bridge *bridge)
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{
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struct vexpress_config_bridge __bridge = *bridge;
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int i;
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mutex_lock(&vexpress_config_bridges_mutex);
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for (i = 0; i < ARRAY_SIZE(vexpress_config_bridges); i++)
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if (&vexpress_config_bridges[i] == bridge)
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__clear_bit(i, vexpress_config_bridges_map);
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mutex_unlock(&vexpress_config_bridges_mutex);
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WARN_ON(!list_empty(&__bridge.transactions));
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while (!list_empty(&__bridge.transactions))
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cpu_relax();
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}
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struct vexpress_config_func {
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struct vexpress_config_bridge *bridge;
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void *func;
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};
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struct vexpress_config_func *__vexpress_config_func_get(struct device *dev,
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struct device_node *node)
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{
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struct device_node *bridge_node;
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struct vexpress_config_func *func;
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int i;
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if (WARN_ON(dev && node && dev->of_node != node))
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return NULL;
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if (dev && !node)
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node = dev->of_node;
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func = kzalloc(sizeof(*func), GFP_KERNEL);
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if (!func)
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return NULL;
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bridge_node = of_node_get(node);
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while (bridge_node) {
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const __be32 *prop = of_get_property(bridge_node,
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"arm,vexpress,config-bridge", NULL);
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if (prop) {
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bridge_node = of_find_node_by_phandle(
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be32_to_cpup(prop));
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break;
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}
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bridge_node = of_get_next_parent(bridge_node);
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}
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mutex_lock(&vexpress_config_bridges_mutex);
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for (i = 0; i < ARRAY_SIZE(vexpress_config_bridges); i++) {
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struct vexpress_config_bridge *bridge =
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&vexpress_config_bridges[i];
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if (test_bit(i, vexpress_config_bridges_map) &&
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bridge->node == bridge_node) {
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func->bridge = bridge;
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func->func = bridge->info->func_get(dev, node);
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break;
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}
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}
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mutex_unlock(&vexpress_config_bridges_mutex);
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if (!func->func) {
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of_node_put(node);
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kfree(func);
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return NULL;
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}
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return func;
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}
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void vexpress_config_func_put(struct vexpress_config_func *func)
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{
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func->bridge->info->func_put(func->func);
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of_node_put(func->bridge->node);
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kfree(func);
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}
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struct vexpress_config_trans {
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struct vexpress_config_func *func;
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int offset;
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bool write;
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u32 *data;
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int status;
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struct completion completion;
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struct list_head list;
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};
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static void vexpress_config_dump_trans(const char *what,
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struct vexpress_config_trans *trans)
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{
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pr_debug("%s %s trans %p func 0x%p offset %d data 0x%x status %d\n",
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what, trans->write ? "write" : "read", trans,
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trans->func->func, trans->offset,
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trans->data ? *trans->data : 0, trans->status);
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}
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static int vexpress_config_schedule(struct vexpress_config_trans *trans)
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{
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int status;
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struct vexpress_config_bridge *bridge = trans->func->bridge;
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unsigned long flags;
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init_completion(&trans->completion);
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trans->status = -EFAULT;
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spin_lock_irqsave(&bridge->transactions_lock, flags);
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vexpress_config_dump_trans("Executing", trans);
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if (list_empty(&bridge->transactions))
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status = bridge->info->func_exec(trans->func->func,
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trans->offset, trans->write, trans->data);
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else
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status = VEXPRESS_CONFIG_STATUS_WAIT;
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switch (status) {
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case VEXPRESS_CONFIG_STATUS_DONE:
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vexpress_config_dump_trans("Finished", trans);
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trans->status = status;
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break;
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case VEXPRESS_CONFIG_STATUS_WAIT:
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list_add_tail(&trans->list, &bridge->transactions);
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break;
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}
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spin_unlock_irqrestore(&bridge->transactions_lock, flags);
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return status;
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}
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void vexpress_config_complete(struct vexpress_config_bridge *bridge,
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int status)
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{
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struct vexpress_config_trans *trans;
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unsigned long flags;
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spin_lock_irqsave(&bridge->transactions_lock, flags);
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trans = list_first_entry(&bridge->transactions,
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struct vexpress_config_trans, list);
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vexpress_config_dump_trans("Completed", trans);
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trans->status = status;
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list_del(&trans->list);
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if (!list_empty(&bridge->transactions)) {
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vexpress_config_dump_trans("Pending", trans);
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bridge->info->func_exec(trans->func->func, trans->offset,
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trans->write, trans->data);
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}
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spin_unlock_irqrestore(&bridge->transactions_lock, flags);
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complete(&trans->completion);
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}
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int vexpress_config_wait(struct vexpress_config_trans *trans)
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{
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wait_for_completion(&trans->completion);
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return trans->status;
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}
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int vexpress_config_read(struct vexpress_config_func *func, int offset,
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u32 *data)
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{
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struct vexpress_config_trans trans = {
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.func = func,
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.offset = offset,
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.write = false,
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.data = data,
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.status = 0,
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};
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int status = vexpress_config_schedule(&trans);
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if (status == VEXPRESS_CONFIG_STATUS_WAIT)
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status = vexpress_config_wait(&trans);
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return status;
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}
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EXPORT_SYMBOL(vexpress_config_read);
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int vexpress_config_write(struct vexpress_config_func *func, int offset,
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u32 data)
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{
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struct vexpress_config_trans trans = {
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.func = func,
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.offset = offset,
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.write = true,
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.data = &data,
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.status = 0,
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};
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int status = vexpress_config_schedule(&trans);
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if (status == VEXPRESS_CONFIG_STATUS_WAIT)
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status = vexpress_config_wait(&trans);
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return status;
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}
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EXPORT_SYMBOL(vexpress_config_write);
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