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1760debb51
These are just hard coded in the RISC-V port, which doesn't make any sense. We should probably be setting these from device tree entries when they exist, but for now I think it's saner to just leave them all as their default values. Reviewed-by: Jeremy Linton <jeremy.linton@arm.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
98 lines
2.8 KiB
C
98 lines
2.8 KiB
C
/*
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* Copyright (C) 2017 SiFive
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/cacheinfo.h>
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#include <linux/cpu.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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static void ci_leaf_init(struct cacheinfo *this_leaf,
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struct device_node *node,
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enum cache_type type, unsigned int level)
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{
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this_leaf->level = level;
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this_leaf->type = type;
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}
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static int __init_cache_level(unsigned int cpu)
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{
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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struct device_node *np = of_cpu_device_node_get(cpu);
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int levels = 0, leaves = 0, level;
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if (of_property_read_bool(np, "cache-size"))
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++leaves;
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if (of_property_read_bool(np, "i-cache-size"))
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++leaves;
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if (of_property_read_bool(np, "d-cache-size"))
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++leaves;
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if (leaves > 0)
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levels = 1;
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while ((np = of_find_next_cache_node(np))) {
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if (!of_device_is_compatible(np, "cache"))
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break;
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if (of_property_read_u32(np, "cache-level", &level))
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break;
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if (level <= levels)
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break;
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if (of_property_read_bool(np, "cache-size"))
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++leaves;
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if (of_property_read_bool(np, "i-cache-size"))
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++leaves;
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if (of_property_read_bool(np, "d-cache-size"))
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++leaves;
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levels = level;
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}
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this_cpu_ci->num_levels = levels;
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this_cpu_ci->num_leaves = leaves;
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return 0;
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}
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static int __populate_cache_leaves(unsigned int cpu)
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{
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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struct cacheinfo *this_leaf = this_cpu_ci->info_list;
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struct device_node *np = of_cpu_device_node_get(cpu);
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int levels = 1, level = 1;
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if (of_property_read_bool(np, "cache-size"))
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ci_leaf_init(this_leaf++, np, CACHE_TYPE_UNIFIED, level);
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if (of_property_read_bool(np, "i-cache-size"))
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ci_leaf_init(this_leaf++, np, CACHE_TYPE_INST, level);
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if (of_property_read_bool(np, "d-cache-size"))
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ci_leaf_init(this_leaf++, np, CACHE_TYPE_DATA, level);
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while ((np = of_find_next_cache_node(np))) {
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if (!of_device_is_compatible(np, "cache"))
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break;
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if (of_property_read_u32(np, "cache-level", &level))
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break;
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if (level <= levels)
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break;
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if (of_property_read_bool(np, "cache-size"))
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ci_leaf_init(this_leaf++, np, CACHE_TYPE_UNIFIED, level);
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if (of_property_read_bool(np, "i-cache-size"))
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ci_leaf_init(this_leaf++, np, CACHE_TYPE_INST, level);
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if (of_property_read_bool(np, "d-cache-size"))
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ci_leaf_init(this_leaf++, np, CACHE_TYPE_DATA, level);
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levels = level;
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}
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return 0;
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}
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DEFINE_SMP_CALL_CACHE_FUNCTION(init_cache_level)
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DEFINE_SMP_CALL_CACHE_FUNCTION(populate_cache_leaves)
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