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d21ce554e1
Driver should tell the number of memory planes and component planes. the amphion vpu support non contiguous planes, but for compatibility with other device that only support contiguous planes. driver can add support for contiguous planes in the same time. Then the mem_planes can be different from the comp_planes. driver need to handle buffer according mem_planes and comp_planes. So driver can support NV12 and NV12M. Signed-off-by: Ming Qian <ming.qian@nxp.com> Reviewed-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
74 lines
3.0 KiB
C
74 lines
3.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2020-2021 NXP
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*/
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#ifndef _AMPHION_VPU_HELPERS_H
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#define _AMPHION_VPU_HELPERS_H
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struct vpu_pair {
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u32 src;
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u32 dst;
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};
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int vpu_helper_find_in_array_u8(const u8 *array, u32 size, u32 x);
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bool vpu_helper_check_type(struct vpu_inst *inst, u32 type);
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const struct vpu_format *vpu_helper_find_format(struct vpu_inst *inst, u32 type, u32 pixelfmt);
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const struct vpu_format *vpu_helper_find_sibling(struct vpu_inst *inst, u32 type, u32 pixelfmt);
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bool vpu_helper_match_format(struct vpu_inst *inst, u32 type, u32 fmta, u32 fmtb);
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const struct vpu_format *vpu_helper_enum_format(struct vpu_inst *inst, u32 type, int index);
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u32 vpu_helper_valid_frame_width(struct vpu_inst *inst, u32 width);
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u32 vpu_helper_valid_frame_height(struct vpu_inst *inst, u32 height);
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u32 vpu_helper_get_plane_size(u32 fmt, u32 width, u32 height, int plane_no,
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u32 stride, u32 interlaced, u32 *pbl);
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int vpu_helper_copy_from_stream_buffer(struct vpu_buffer *stream_buffer,
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u32 *rptr, u32 size, void *dst);
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int vpu_helper_copy_to_stream_buffer(struct vpu_buffer *stream_buffer,
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u32 *wptr, u32 size, void *src);
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int vpu_helper_memset_stream_buffer(struct vpu_buffer *stream_buffer,
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u32 *wptr, u8 val, u32 size);
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u32 vpu_helper_get_free_space(struct vpu_inst *inst);
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u32 vpu_helper_get_used_space(struct vpu_inst *inst);
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int vpu_helper_g_volatile_ctrl(struct v4l2_ctrl *ctrl);
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void vpu_helper_get_kmp_next(const u8 *pattern, int *next, int size);
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int vpu_helper_kmp_search(u8 *s, int s_len, const u8 *p, int p_len, int *next);
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int vpu_helper_kmp_search_in_stream_buffer(struct vpu_buffer *stream_buffer,
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u32 offset, int bytesused,
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const u8 *p, int p_len, int *next);
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int vpu_helper_find_startcode(struct vpu_buffer *stream_buffer,
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u32 pixelformat, u32 offset, u32 bytesused);
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static inline u32 vpu_helper_step_walk(struct vpu_buffer *stream_buffer, u32 pos, u32 step)
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{
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pos += step;
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if (pos > stream_buffer->phys + stream_buffer->length)
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pos -= stream_buffer->length;
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return pos;
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}
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static inline u8 vpu_helper_read_byte(struct vpu_buffer *stream_buffer, u32 pos)
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{
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u8 *pdata = (u8 *)stream_buffer->virt;
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return pdata[pos % stream_buffer->length];
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}
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int vpu_color_check_primaries(u32 primaries);
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int vpu_color_check_transfers(u32 transfers);
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int vpu_color_check_matrix(u32 matrix);
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int vpu_color_check_full_range(u32 full_range);
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u32 vpu_color_cvrt_primaries_v2i(u32 primaries);
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u32 vpu_color_cvrt_primaries_i2v(u32 primaries);
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u32 vpu_color_cvrt_transfers_v2i(u32 transfers);
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u32 vpu_color_cvrt_transfers_i2v(u32 transfers);
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u32 vpu_color_cvrt_matrix_v2i(u32 matrix);
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u32 vpu_color_cvrt_matrix_i2v(u32 matrix);
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u32 vpu_color_cvrt_full_range_v2i(u32 full_range);
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u32 vpu_color_cvrt_full_range_i2v(u32 full_range);
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int vpu_color_get_default(u32 primaries, u32 *ptransfers, u32 *pmatrix, u32 *pfull_range);
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int vpu_find_dst_by_src(struct vpu_pair *pairs, u32 cnt, u32 src);
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int vpu_find_src_by_dst(struct vpu_pair *pairs, u32 cnt, u32 dst);
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#endif
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