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Capacity Awareness refers to the fact that on heterogeneous systems (like Arm big.LITTLE), the capacity of the CPUs is not uniform, hence when placing tasks we need to be aware of this difference of CPU capacities. In such scenarios we want to ensure that the selected CPU has enough capacity to meet the requirement of the running task. Enough capacity means here that capacity_orig_of(cpu) >= task.requirement. The definition of task.requirement is dependent on the scheduling class. For CFS, utilization is used to select a CPU that has >= capacity value than the cfs_task.util. capacity_orig_of(cpu) >= cfs_task.util DL isn't capacity aware at the moment but can make use of the bandwidth reservation to implement that in a similar manner CFS uses utilization. The following patchset implements that: https://lore.kernel.org/lkml/20190506044836.2914-1-luca.abeni@santannapisa.it/ capacity_orig_of(cpu)/SCHED_CAPACITY >= dl_deadline/dl_runtime For RT we don't have a per task utilization signal and we lack any information in general about what performance requirement the RT task needs. But with the introduction of uclamp, RT tasks can now control that by setting uclamp_min to guarantee a minimum performance point. ATM the uclamp value are only used for frequency selection; but on heterogeneous systems this is not enough and we need to ensure that the capacity of the CPU is >= uclamp_min. Which is what implemented here. capacity_orig_of(cpu) >= rt_task.uclamp_min Note that by default uclamp.min is 1024, which means that RT tasks will always be biased towards the big CPUs, which make for a better more predictable behavior for the default case. Must stress that the bias acts as a hint rather than a definite placement strategy. For example, if all big cores are busy executing other RT tasks we can't guarantee that a new RT task will be placed there. On non-heterogeneous systems the original behavior of RT should be retained. Similarly if uclamp is not selected in the config. [ mingo: Minor edits to comments. ] Signed-off-by: Qais Yousef <qais.yousef@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Dietmar Eggemann <dietmar.eggemann@arm.com> Reviewed-by: Steven Rostedt (VMware) <rostedt@goodmis.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20191009104611.15363-1-qais.yousef@arm.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
259 lines
7.0 KiB
C
259 lines
7.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* kernel/sched/cpupri.c
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*
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* CPU priority management
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*
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* Copyright (C) 2007-2008 Novell
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*
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* Author: Gregory Haskins <ghaskins@novell.com>
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*
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* This code tracks the priority of each CPU so that global migration
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* decisions are easy to calculate. Each CPU can be in a state as follows:
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*
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* (INVALID), IDLE, NORMAL, RT1, ... RT99
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*
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* going from the lowest priority to the highest. CPUs in the INVALID state
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* are not eligible for routing. The system maintains this state with
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* a 2 dimensional bitmap (the first for priority class, the second for CPUs
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* in that class). Therefore a typical application without affinity
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* restrictions can find a suitable CPU with O(1) complexity (e.g. two bit
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* searches). For tasks with affinity restrictions, the algorithm has a
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* worst case complexity of O(min(102, nr_domcpus)), though the scenario that
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* yields the worst case search is fairly contrived.
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*/
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#include "sched.h"
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/* Convert between a 140 based task->prio, and our 102 based cpupri */
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static int convert_prio(int prio)
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{
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int cpupri;
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if (prio == CPUPRI_INVALID)
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cpupri = CPUPRI_INVALID;
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else if (prio == MAX_PRIO)
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cpupri = CPUPRI_IDLE;
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else if (prio >= MAX_RT_PRIO)
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cpupri = CPUPRI_NORMAL;
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else
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cpupri = MAX_RT_PRIO - prio + 1;
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return cpupri;
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}
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/**
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* cpupri_find - find the best (lowest-pri) CPU in the system
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* @cp: The cpupri context
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* @p: The task
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* @lowest_mask: A mask to fill in with selected CPUs (or NULL)
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* @fitness_fn: A pointer to a function to do custom checks whether the CPU
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* fits a specific criteria so that we only return those CPUs.
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*
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* Note: This function returns the recommended CPUs as calculated during the
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* current invocation. By the time the call returns, the CPUs may have in
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* fact changed priorities any number of times. While not ideal, it is not
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* an issue of correctness since the normal rebalancer logic will correct
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* any discrepancies created by racing against the uncertainty of the current
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* priority configuration.
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*
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* Return: (int)bool - CPUs were found
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*/
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int cpupri_find(struct cpupri *cp, struct task_struct *p,
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struct cpumask *lowest_mask,
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bool (*fitness_fn)(struct task_struct *p, int cpu))
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{
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int idx = 0;
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int task_pri = convert_prio(p->prio);
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BUG_ON(task_pri >= CPUPRI_NR_PRIORITIES);
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for (idx = 0; idx < task_pri; idx++) {
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struct cpupri_vec *vec = &cp->pri_to_cpu[idx];
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int skip = 0;
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if (!atomic_read(&(vec)->count))
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skip = 1;
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/*
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* When looking at the vector, we need to read the counter,
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* do a memory barrier, then read the mask.
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*
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* Note: This is still all racey, but we can deal with it.
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* Ideally, we only want to look at masks that are set.
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*
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* If a mask is not set, then the only thing wrong is that we
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* did a little more work than necessary.
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*
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* If we read a zero count but the mask is set, because of the
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* memory barriers, that can only happen when the highest prio
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* task for a run queue has left the run queue, in which case,
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* it will be followed by a pull. If the task we are processing
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* fails to find a proper place to go, that pull request will
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* pull this task if the run queue is running at a lower
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* priority.
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*/
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smp_rmb();
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/* Need to do the rmb for every iteration */
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if (skip)
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continue;
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if (cpumask_any_and(p->cpus_ptr, vec->mask) >= nr_cpu_ids)
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continue;
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if (lowest_mask) {
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int cpu;
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cpumask_and(lowest_mask, p->cpus_ptr, vec->mask);
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/*
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* We have to ensure that we have at least one bit
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* still set in the array, since the map could have
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* been concurrently emptied between the first and
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* second reads of vec->mask. If we hit this
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* condition, simply act as though we never hit this
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* priority level and continue on.
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*/
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if (cpumask_empty(lowest_mask))
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continue;
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if (!fitness_fn)
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return 1;
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/* Ensure the capacity of the CPUs fit the task */
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for_each_cpu(cpu, lowest_mask) {
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if (!fitness_fn(p, cpu))
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cpumask_clear_cpu(cpu, lowest_mask);
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}
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/*
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* If no CPU at the current priority can fit the task
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* continue looking
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*/
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if (cpumask_empty(lowest_mask))
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continue;
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}
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return 1;
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}
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return 0;
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}
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/**
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* cpupri_set - update the CPU priority setting
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* @cp: The cpupri context
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* @cpu: The target CPU
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* @newpri: The priority (INVALID-RT99) to assign to this CPU
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*
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* Note: Assumes cpu_rq(cpu)->lock is locked
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*
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* Returns: (void)
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*/
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void cpupri_set(struct cpupri *cp, int cpu, int newpri)
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{
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int *currpri = &cp->cpu_to_pri[cpu];
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int oldpri = *currpri;
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int do_mb = 0;
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newpri = convert_prio(newpri);
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BUG_ON(newpri >= CPUPRI_NR_PRIORITIES);
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if (newpri == oldpri)
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return;
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/*
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* If the CPU was currently mapped to a different value, we
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* need to map it to the new value then remove the old value.
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* Note, we must add the new value first, otherwise we risk the
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* cpu being missed by the priority loop in cpupri_find.
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*/
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if (likely(newpri != CPUPRI_INVALID)) {
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struct cpupri_vec *vec = &cp->pri_to_cpu[newpri];
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cpumask_set_cpu(cpu, vec->mask);
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/*
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* When adding a new vector, we update the mask first,
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* do a write memory barrier, and then update the count, to
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* make sure the vector is visible when count is set.
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*/
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smp_mb__before_atomic();
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atomic_inc(&(vec)->count);
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do_mb = 1;
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}
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if (likely(oldpri != CPUPRI_INVALID)) {
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struct cpupri_vec *vec = &cp->pri_to_cpu[oldpri];
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/*
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* Because the order of modification of the vec->count
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* is important, we must make sure that the update
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* of the new prio is seen before we decrement the
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* old prio. This makes sure that the loop sees
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* one or the other when we raise the priority of
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* the run queue. We don't care about when we lower the
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* priority, as that will trigger an rt pull anyway.
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*
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* We only need to do a memory barrier if we updated
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* the new priority vec.
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*/
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if (do_mb)
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smp_mb__after_atomic();
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/*
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* When removing from the vector, we decrement the counter first
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* do a memory barrier and then clear the mask.
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*/
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atomic_dec(&(vec)->count);
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smp_mb__after_atomic();
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cpumask_clear_cpu(cpu, vec->mask);
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}
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*currpri = newpri;
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}
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/**
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* cpupri_init - initialize the cpupri structure
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* @cp: The cpupri context
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*
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* Return: -ENOMEM on memory allocation failure.
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*/
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int cpupri_init(struct cpupri *cp)
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{
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int i;
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for (i = 0; i < CPUPRI_NR_PRIORITIES; i++) {
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struct cpupri_vec *vec = &cp->pri_to_cpu[i];
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atomic_set(&vec->count, 0);
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if (!zalloc_cpumask_var(&vec->mask, GFP_KERNEL))
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goto cleanup;
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}
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cp->cpu_to_pri = kcalloc(nr_cpu_ids, sizeof(int), GFP_KERNEL);
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if (!cp->cpu_to_pri)
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goto cleanup;
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for_each_possible_cpu(i)
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cp->cpu_to_pri[i] = CPUPRI_INVALID;
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return 0;
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cleanup:
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for (i--; i >= 0; i--)
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free_cpumask_var(cp->pri_to_cpu[i].mask);
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return -ENOMEM;
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}
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/**
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* cpupri_cleanup - clean up the cpupri structure
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* @cp: The cpupri context
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*/
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void cpupri_cleanup(struct cpupri *cp)
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{
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int i;
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kfree(cp->cpu_to_pri);
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for (i = 0; i < CPUPRI_NR_PRIORITIES; i++)
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free_cpumask_var(cp->pri_to_cpu[i].mask);
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}
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