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ecfb751f1a
pointers should be casted to unsigned long to avoid
-Wpointer-to-int-cast warnings:
drivers/net/ethernet/intel/ice/ice_flow.h:197:33: warning:
cast from pointer to integer of different size
drivers/net/ethernet/intel/ice/ice_flow.h:198:32: warning:
cast to pointer from integer of different size
Signed-off-by: Bixuan Cui <cuibixuan@huawei.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
253 lines
8.2 KiB
C
253 lines
8.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2019, Intel Corporation. */
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#ifndef _ICE_FLOW_H_
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#define _ICE_FLOW_H_
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#define ICE_FLOW_ENTRY_HANDLE_INVAL 0
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#define ICE_FLOW_FLD_OFF_INVAL 0xffff
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/* Generate flow hash field from flow field type(s) */
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#define ICE_FLOW_HASH_IPV4 \
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(BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) | \
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BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA))
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#define ICE_FLOW_HASH_IPV6 \
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(BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) | \
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BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA))
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#define ICE_FLOW_HASH_TCP_PORT \
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(BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT) | \
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BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT))
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#define ICE_FLOW_HASH_UDP_PORT \
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(BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT) | \
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BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT))
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#define ICE_FLOW_HASH_SCTP_PORT \
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(BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT) | \
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BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT))
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#define ICE_HASH_INVALID 0
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#define ICE_HASH_TCP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_TCP_PORT)
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#define ICE_HASH_TCP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_TCP_PORT)
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#define ICE_HASH_UDP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_UDP_PORT)
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#define ICE_HASH_UDP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_UDP_PORT)
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/* Protocol header fields within a packet segment. A segment consists of one or
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* more protocol headers that make up a logical group of protocol headers. Each
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* logical group of protocol headers encapsulates or is encapsulated using/by
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* tunneling or encapsulation protocols for network virtualization such as GRE,
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* VxLAN, etc.
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*/
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enum ice_flow_seg_hdr {
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ICE_FLOW_SEG_HDR_NONE = 0x00000000,
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ICE_FLOW_SEG_HDR_IPV4 = 0x00000004,
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ICE_FLOW_SEG_HDR_IPV6 = 0x00000008,
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ICE_FLOW_SEG_HDR_TCP = 0x00000040,
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ICE_FLOW_SEG_HDR_UDP = 0x00000080,
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ICE_FLOW_SEG_HDR_SCTP = 0x00000100,
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ICE_FLOW_SEG_HDR_GRE = 0x00000200,
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};
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enum ice_flow_field {
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/* L3 */
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ICE_FLOW_FIELD_IDX_IPV4_SA,
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ICE_FLOW_FIELD_IDX_IPV4_DA,
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ICE_FLOW_FIELD_IDX_IPV6_SA,
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ICE_FLOW_FIELD_IDX_IPV6_DA,
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/* L4 */
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ICE_FLOW_FIELD_IDX_TCP_SRC_PORT,
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ICE_FLOW_FIELD_IDX_TCP_DST_PORT,
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ICE_FLOW_FIELD_IDX_UDP_SRC_PORT,
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ICE_FLOW_FIELD_IDX_UDP_DST_PORT,
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ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT,
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ICE_FLOW_FIELD_IDX_SCTP_DST_PORT,
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/* GRE */
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ICE_FLOW_FIELD_IDX_GRE_KEYID,
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/* The total number of enums must not exceed 64 */
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ICE_FLOW_FIELD_IDX_MAX
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};
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/* Flow headers and fields for AVF support */
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enum ice_flow_avf_hdr_field {
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/* Values 0 - 28 are reserved for future use */
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ICE_AVF_FLOW_FIELD_INVALID = 0,
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ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP = 29,
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ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP,
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ICE_AVF_FLOW_FIELD_IPV4_UDP,
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ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK,
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ICE_AVF_FLOW_FIELD_IPV4_TCP,
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ICE_AVF_FLOW_FIELD_IPV4_SCTP,
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ICE_AVF_FLOW_FIELD_IPV4_OTHER,
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ICE_AVF_FLOW_FIELD_FRAG_IPV4,
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/* Values 37-38 are reserved */
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ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP = 39,
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ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP,
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ICE_AVF_FLOW_FIELD_IPV6_UDP,
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ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK,
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ICE_AVF_FLOW_FIELD_IPV6_TCP,
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ICE_AVF_FLOW_FIELD_IPV6_SCTP,
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ICE_AVF_FLOW_FIELD_IPV6_OTHER,
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ICE_AVF_FLOW_FIELD_FRAG_IPV6,
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ICE_AVF_FLOW_FIELD_RSVD47,
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ICE_AVF_FLOW_FIELD_FCOE_OX,
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ICE_AVF_FLOW_FIELD_FCOE_RX,
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ICE_AVF_FLOW_FIELD_FCOE_OTHER,
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/* Values 51-62 are reserved */
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ICE_AVF_FLOW_FIELD_L2_PAYLOAD = 63,
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ICE_AVF_FLOW_FIELD_MAX
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};
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/* Supported RSS offloads This macro is defined to support
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* VIRTCHNL_OP_GET_RSS_HENA_CAPS ops. PF driver sends the RSS hardware
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* capabilities to the caller of this ops.
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*/
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#define ICE_DEFAULT_RSS_HENA ( \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \
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BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP))
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enum ice_flow_dir {
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ICE_FLOW_RX = 0x02,
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};
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enum ice_flow_priority {
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ICE_FLOW_PRIO_LOW,
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ICE_FLOW_PRIO_NORMAL,
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ICE_FLOW_PRIO_HIGH
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};
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#define ICE_FLOW_SEG_MAX 2
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#define ICE_FLOW_SEG_RAW_FLD_MAX 2
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#define ICE_FLOW_FV_EXTRACT_SZ 2
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#define ICE_FLOW_SET_HDRS(seg, val) ((seg)->hdrs |= (u32)(val))
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struct ice_flow_seg_xtrct {
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u8 prot_id; /* Protocol ID of extracted header field */
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u16 off; /* Starting offset of the field in header in bytes */
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u8 idx; /* Index of FV entry used */
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u8 disp; /* Displacement of field in bits fr. FV entry's start */
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};
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enum ice_flow_fld_match_type {
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ICE_FLOW_FLD_TYPE_REG, /* Value, mask */
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ICE_FLOW_FLD_TYPE_RANGE, /* Value, mask, last (upper bound) */
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ICE_FLOW_FLD_TYPE_PREFIX, /* IP address, prefix, size of prefix */
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ICE_FLOW_FLD_TYPE_SIZE, /* Value, mask, size of match */
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};
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struct ice_flow_fld_loc {
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/* Describe offsets of field information relative to the beginning of
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* input buffer provided when adding flow entries.
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*/
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u16 val; /* Offset where the value is located */
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u16 mask; /* Offset where the mask/prefix value is located */
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u16 last; /* Length or offset where the upper value is located */
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};
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struct ice_flow_fld_info {
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enum ice_flow_fld_match_type type;
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/* Location where to retrieve data from an input buffer */
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struct ice_flow_fld_loc src;
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/* Location where to put the data into the final entry buffer */
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struct ice_flow_fld_loc entry;
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struct ice_flow_seg_xtrct xtrct;
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};
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struct ice_flow_seg_fld_raw {
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struct ice_flow_fld_info info;
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u16 off; /* Offset from the start of the segment */
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};
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struct ice_flow_seg_info {
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u32 hdrs; /* Bitmask indicating protocol headers present */
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u64 match; /* Bitmask indicating header fields to be matched */
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u64 range; /* Bitmask indicating header fields matched as ranges */
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struct ice_flow_fld_info fields[ICE_FLOW_FIELD_IDX_MAX];
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u8 raws_cnt; /* Number of raw fields to be matched */
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struct ice_flow_seg_fld_raw raws[ICE_FLOW_SEG_RAW_FLD_MAX];
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};
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/* This structure describes a flow entry, and is tracked only in this file */
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struct ice_flow_entry {
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struct list_head l_entry;
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u64 id;
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struct ice_flow_prof *prof;
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/* Flow entry's content */
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void *entry;
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enum ice_flow_priority priority;
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u16 vsi_handle;
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u16 entry_sz;
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};
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#define ICE_FLOW_ENTRY_HNDL(e) ((u64)(uintptr_t)e)
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#define ICE_FLOW_ENTRY_PTR(h) ((struct ice_flow_entry *)(uintptr_t)(h))
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struct ice_flow_prof {
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struct list_head l_entry;
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u64 id;
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enum ice_flow_dir dir;
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u8 segs_cnt;
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/* Keep track of flow entries associated with this flow profile */
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struct mutex entries_lock;
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struct list_head entries;
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struct ice_flow_seg_info segs[ICE_FLOW_SEG_MAX];
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/* software VSI handles referenced by this flow profile */
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DECLARE_BITMAP(vsis, ICE_MAX_VSI);
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};
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struct ice_rss_cfg {
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struct list_head l_entry;
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/* bitmap of VSIs added to the RSS entry */
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DECLARE_BITMAP(vsis, ICE_MAX_VSI);
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u64 hashed_flds;
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u32 packet_hdr;
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};
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enum ice_status
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ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
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u64 prof_id, struct ice_flow_seg_info *segs, u8 segs_cnt,
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struct ice_flow_prof **prof);
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enum ice_status
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ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id);
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enum ice_status
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ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
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u64 entry_id, u16 vsi, enum ice_flow_priority prio,
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void *data, u64 *entry_h);
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enum ice_status
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ice_flow_rem_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_h);
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void
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ice_flow_set_fld(struct ice_flow_seg_info *seg, enum ice_flow_field fld,
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u16 val_loc, u16 mask_loc, u16 last_loc, bool range);
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void
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ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len,
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u16 val_loc, u16 mask_loc);
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void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle);
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enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
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enum ice_status
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ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds);
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enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
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enum ice_status
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ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
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u32 addl_hdrs);
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u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs);
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#endif /* _ICE_FLOW_H_ */
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