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ad3d09b547
The memset implementation carves up the code in different sections, each covered with their own unwind info. In this case, it is done in a way similar to how the compiler might do it, to disambiguate between parts where the return address is in LR and the SP is unmodified, and parts where a stack frame is live, and the unwinder needs to know the size of the stack frame and the location of the return address within it. Only the placement of the unwind directives is slightly odd: the stack pushes are placed in the wrong sections, which may confuse the unwinder when attempting to unwind with PC pointing at the stack push in question. So let's fix this up, by reordering the directives and instructions as appropriate. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Keith Packard <keithpac@amazon.com> Tested-by: Marc Zyngier <maz@kernel.org> Tested-by: Vladimir Murzin <vladimir.murzin@arm.com> # ARMv7M
148 lines
2.9 KiB
ArmAsm
148 lines
2.9 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* linux/arch/arm/lib/memset.S
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*
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* Copyright (C) 1995-2000 Russell King
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*
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* ASM optimised string functions
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/unwind.h>
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.text
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.align 5
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ENTRY(__memset)
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ENTRY(mmioset)
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WEAK(memset)
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UNWIND( .fnstart )
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ands r3, r0, #3 @ 1 unaligned?
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mov ip, r0 @ preserve r0 as return value
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bne 6f @ 1
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/*
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* we know that the pointer in ip is aligned to a word boundary.
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*/
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1: orr r1, r1, r1, lsl #8
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orr r1, r1, r1, lsl #16
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mov r3, r1
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7: cmp r2, #16
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blt 4f
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UNWIND( .fnend )
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#if ! CALGN(1)+0
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/*
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* We need 2 extra registers for this loop - use r8 and the LR
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*/
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UNWIND( .fnstart )
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UNWIND( .save {r8, lr} )
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stmfd sp!, {r8, lr}
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mov r8, r1
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mov lr, r3
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2: subs r2, r2, #64
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stmiage ip!, {r1, r3, r8, lr} @ 64 bytes at a time.
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stmiage ip!, {r1, r3, r8, lr}
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stmiage ip!, {r1, r3, r8, lr}
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stmiage ip!, {r1, r3, r8, lr}
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bgt 2b
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ldmfdeq sp!, {r8, pc} @ Now <64 bytes to go.
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/*
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* No need to correct the count; we're only testing bits from now on
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*/
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tst r2, #32
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stmiane ip!, {r1, r3, r8, lr}
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stmiane ip!, {r1, r3, r8, lr}
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tst r2, #16
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stmiane ip!, {r1, r3, r8, lr}
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ldmfd sp!, {r8, lr}
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UNWIND( .fnend )
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#else
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/*
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* This version aligns the destination pointer in order to write
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* whole cache lines at once.
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*/
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UNWIND( .fnstart )
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UNWIND( .save {r4-r8, lr} )
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stmfd sp!, {r4-r8, lr}
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mov r4, r1
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mov r5, r3
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mov r6, r1
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mov r7, r3
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mov r8, r1
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mov lr, r3
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cmp r2, #96
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tstgt ip, #31
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ble 3f
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and r8, ip, #31
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rsb r8, r8, #32
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sub r2, r2, r8
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movs r8, r8, lsl #(32 - 4)
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stmiacs ip!, {r4, r5, r6, r7}
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stmiami ip!, {r4, r5}
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tst r8, #(1 << 30)
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mov r8, r1
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strne r1, [ip], #4
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3: subs r2, r2, #64
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stmiage ip!, {r1, r3-r8, lr}
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stmiage ip!, {r1, r3-r8, lr}
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bgt 3b
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ldmfdeq sp!, {r4-r8, pc}
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tst r2, #32
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stmiane ip!, {r1, r3-r8, lr}
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tst r2, #16
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stmiane ip!, {r4-r7}
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ldmfd sp!, {r4-r8, lr}
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UNWIND( .fnend )
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#endif
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UNWIND( .fnstart )
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4: tst r2, #8
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stmiane ip!, {r1, r3}
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tst r2, #4
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strne r1, [ip], #4
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/*
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* When we get here, we've got less than 4 bytes to set. We
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* may have an unaligned pointer as well.
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*/
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5: tst r2, #2
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strbne r1, [ip], #1
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strbne r1, [ip], #1
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tst r2, #1
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strbne r1, [ip], #1
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ret lr
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6: subs r2, r2, #4 @ 1 do we have enough
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blt 5b @ 1 bytes to align with?
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cmp r3, #2 @ 1
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strblt r1, [ip], #1 @ 1
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strble r1, [ip], #1 @ 1
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strb r1, [ip], #1 @ 1
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add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
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b 1b
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UNWIND( .fnend )
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ENDPROC(memset)
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ENDPROC(mmioset)
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ENDPROC(__memset)
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ENTRY(__memset32)
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UNWIND( .fnstart )
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mov r3, r1 @ copy r1 to r3 and fall into memset64
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UNWIND( .fnend )
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ENDPROC(__memset32)
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ENTRY(__memset64)
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UNWIND( .fnstart )
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mov ip, r0 @ preserve r0 as return value
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b 7b @ jump into the middle of memset
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UNWIND( .fnend )
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ENDPROC(__memset64)
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