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3ae977d0e4
parent is the interrupt parent, not the parent of node. Use
node->parent. This fixes endianness detection on big-endian platforms.
Fixes: 1b00adce8a
("irqchip/ls-extirq: Fix invalid wait context by avoiding to use regmap")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221201212807.616191-1-sean.anderson@seco.com
233 lines
5.2 KiB
C
233 lines
5.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#define pr_fmt(fmt) "irq-ls-extirq: " fmt
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/irqdomain.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/slab.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#define MAXIRQ 12
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#define LS1021A_SCFGREVCR 0x200
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struct ls_extirq_data {
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void __iomem *intpcr;
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raw_spinlock_t lock;
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bool big_endian;
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bool is_ls1021a_or_ls1043a;
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u32 nirq;
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struct irq_fwspec map[MAXIRQ];
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};
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static void ls_extirq_intpcr_rmw(struct ls_extirq_data *priv, u32 mask,
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u32 value)
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{
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u32 intpcr;
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/*
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* Serialize concurrent calls to ls_extirq_set_type() from multiple
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* IRQ descriptors, making sure the read-modify-write is atomic.
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*/
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raw_spin_lock(&priv->lock);
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if (priv->big_endian)
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intpcr = ioread32be(priv->intpcr);
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else
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intpcr = ioread32(priv->intpcr);
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intpcr &= ~mask;
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intpcr |= value;
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if (priv->big_endian)
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iowrite32be(intpcr, priv->intpcr);
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else
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iowrite32(intpcr, priv->intpcr);
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raw_spin_unlock(&priv->lock);
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}
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static int
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ls_extirq_set_type(struct irq_data *data, unsigned int type)
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{
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struct ls_extirq_data *priv = data->chip_data;
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irq_hw_number_t hwirq = data->hwirq;
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u32 value, mask;
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if (priv->is_ls1021a_or_ls1043a)
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mask = 1U << (31 - hwirq);
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else
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mask = 1U << hwirq;
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switch (type) {
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case IRQ_TYPE_LEVEL_LOW:
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type = IRQ_TYPE_LEVEL_HIGH;
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value = mask;
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break;
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case IRQ_TYPE_EDGE_FALLING:
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type = IRQ_TYPE_EDGE_RISING;
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value = mask;
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break;
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case IRQ_TYPE_LEVEL_HIGH:
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case IRQ_TYPE_EDGE_RISING:
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value = 0;
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break;
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default:
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return -EINVAL;
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}
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ls_extirq_intpcr_rmw(priv, mask, value);
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return irq_chip_set_type_parent(data, type);
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}
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static struct irq_chip ls_extirq_chip = {
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.name = "ls-extirq",
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.irq_mask = irq_chip_mask_parent,
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.irq_unmask = irq_chip_unmask_parent,
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.irq_eoi = irq_chip_eoi_parent,
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.irq_set_type = ls_extirq_set_type,
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.irq_retrigger = irq_chip_retrigger_hierarchy,
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.irq_set_affinity = irq_chip_set_affinity_parent,
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.flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_SKIP_SET_WAKE,
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};
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static int
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ls_extirq_domain_alloc(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs, void *arg)
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{
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struct ls_extirq_data *priv = domain->host_data;
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struct irq_fwspec *fwspec = arg;
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irq_hw_number_t hwirq;
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if (fwspec->param_count != 2)
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return -EINVAL;
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hwirq = fwspec->param[0];
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if (hwirq >= priv->nirq)
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return -EINVAL;
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irq_domain_set_hwirq_and_chip(domain, virq, hwirq, &ls_extirq_chip,
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priv);
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return irq_domain_alloc_irqs_parent(domain, virq, 1, &priv->map[hwirq]);
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}
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static const struct irq_domain_ops extirq_domain_ops = {
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.xlate = irq_domain_xlate_twocell,
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.alloc = ls_extirq_domain_alloc,
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.free = irq_domain_free_irqs_common,
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};
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static int
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ls_extirq_parse_map(struct ls_extirq_data *priv, struct device_node *node)
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{
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const __be32 *map;
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u32 mapsize;
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int ret;
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map = of_get_property(node, "interrupt-map", &mapsize);
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if (!map)
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return -ENOENT;
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if (mapsize % sizeof(*map))
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return -EINVAL;
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mapsize /= sizeof(*map);
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while (mapsize) {
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struct device_node *ipar;
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u32 hwirq, intsize, j;
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if (mapsize < 3)
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return -EINVAL;
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hwirq = be32_to_cpup(map);
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if (hwirq >= MAXIRQ)
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return -EINVAL;
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priv->nirq = max(priv->nirq, hwirq + 1);
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ipar = of_find_node_by_phandle(be32_to_cpup(map + 2));
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map += 3;
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mapsize -= 3;
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if (!ipar)
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return -EINVAL;
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priv->map[hwirq].fwnode = &ipar->fwnode;
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ret = of_property_read_u32(ipar, "#interrupt-cells", &intsize);
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if (ret)
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return ret;
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if (intsize > mapsize)
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return -EINVAL;
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priv->map[hwirq].param_count = intsize;
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for (j = 0; j < intsize; ++j)
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priv->map[hwirq].param[j] = be32_to_cpup(map++);
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mapsize -= intsize;
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}
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return 0;
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}
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static int __init
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ls_extirq_of_init(struct device_node *node, struct device_node *parent)
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{
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struct irq_domain *domain, *parent_domain;
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struct ls_extirq_data *priv;
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int ret;
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parent_domain = irq_find_host(parent);
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if (!parent_domain) {
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pr_err("Cannot find parent domain\n");
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ret = -ENODEV;
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goto err_irq_find_host;
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}
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priv = kzalloc(sizeof(*priv), GFP_KERNEL);
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if (!priv) {
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ret = -ENOMEM;
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goto err_alloc_priv;
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}
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/*
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* All extirq OF nodes are under a scfg/syscon node with
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* the 'ranges' property
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*/
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priv->intpcr = of_iomap(node, 0);
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if (!priv->intpcr) {
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pr_err("Cannot ioremap OF node %pOF\n", node);
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ret = -ENOMEM;
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goto err_iomap;
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}
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ret = ls_extirq_parse_map(priv, node);
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if (ret)
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goto err_parse_map;
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priv->big_endian = of_device_is_big_endian(node->parent);
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priv->is_ls1021a_or_ls1043a = of_device_is_compatible(node, "fsl,ls1021a-extirq") ||
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of_device_is_compatible(node, "fsl,ls1043a-extirq");
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raw_spin_lock_init(&priv->lock);
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domain = irq_domain_add_hierarchy(parent_domain, 0, priv->nirq, node,
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&extirq_domain_ops, priv);
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if (!domain) {
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ret = -ENOMEM;
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goto err_add_hierarchy;
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}
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return 0;
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err_add_hierarchy:
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err_parse_map:
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iounmap(priv->intpcr);
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err_iomap:
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kfree(priv);
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err_alloc_priv:
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err_irq_find_host:
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return ret;
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}
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IRQCHIP_DECLARE(ls1021a_extirq, "fsl,ls1021a-extirq", ls_extirq_of_init);
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IRQCHIP_DECLARE(ls1043a_extirq, "fsl,ls1043a-extirq", ls_extirq_of_init);
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IRQCHIP_DECLARE(ls1088a_extirq, "fsl,ls1088a-extirq", ls_extirq_of_init);
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