linux/arch/riscv
Arnd Bergmann 79384a0475 RISC-V Devicetrees for v6.7
StarFive:
 Things are a bit slower for StarFive this window, there's only the
 addition of audio related DT nodes to speak of here.
 
 Generic:
 The SiFive, StarFive and Microchip devicetrees have had my replacement
 ISA extension detection properties added. Unfortunately, the old
 "riscv,isa" property never defined exactly what the extensions it
 contained meant, and people were want to fill it in incorrectly (and
 call upstream kernel devs idiots for not doing the same). The new
 properties have explicit definitions and hopefully will stand up better
 to some of the variation from RVI.
 
 Sophgo:
 Two new SoCs, one is probably the first of several with up/down tuned
 variants, that have a pair of T-Head c906 cores and appear aimed at the
 IP camera, smart <insert whatever> etc markets. They are intended to run
 in AMP mode, with an RTOS on the less powerful core. The other is far
 more interesting to kernel developers however, the 64-core SG2042, with
 more recent c920 cores from T-Head at 2 GHz. For both, support is at a
 very basic stage - some of the same developers are working on them as
 other T-Head powered SoCs, but hopefully things will move beyond a basic
 console boot. The goal is for Chen Wang to take over maintaining the
 Sophgo support once they have some more experience with the process.
 
 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Merge tag 'riscv-dt-for-v6.7' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt

RISC-V Devicetrees for v6.7

StarFive:
Things are a bit slower for StarFive this window, there's only the
addition of audio related DT nodes to speak of here.

Generic:
The SiFive, StarFive and Microchip devicetrees have had my replacement
ISA extension detection properties added. Unfortunately, the old
"riscv,isa" property never defined exactly what the extensions it
contained meant, and people were want to fill it in incorrectly (and
call upstream kernel devs idiots for not doing the same). The new
properties have explicit definitions and hopefully will stand up better
to some of the variation from RVI.

Sophgo:
Two new SoCs, one is probably the first of several with up/down tuned
variants, that have a pair of T-Head c906 cores and appear aimed at the
IP camera, smart <insert whatever> etc markets. They are intended to run
in AMP mode, with an RTOS on the less powerful core. The other is far
more interesting to kernel developers however, the 64-core SG2042, with
more recent c920 cores from T-Head at 2 GHz. For both, support is at a
very basic stage - some of the same developers are working on them as
other T-Head powered SoCs, but hopefully things will move beyond a basic
console boot. The goal is for Chen Wang to take over maintaining the
Sophgo support once they have some more experience with the process.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v6.7' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: (22 commits)
  riscv: dts: starfive: convert isa detection to new properties
  riscv: dts: sifive: convert isa detection to new properties
  riscv: dts: microchip: convert isa detection to new properties
  riscv: dts: sophgo: add Milk-V Duo board device tree
  riscv: dts: sophgo: add initial CV1800B SoC device tree
  dt-bindings: riscv: Add Milk-V Duo board compatibles
  dt-bindings: timer: Add SOPHGO CV1800B clint
  dt-bindings: interrupt-controller: Add SOPHGO CV1800B plic
  riscv: defconfig: enable SOPHGO SoC
  riscv: dts: sophgo: add Milk-V Pioneer board device tree
  riscv: dts: add initial Sophgo SG2042 SoC device tree
  dt-bindings: interrupt-controller: Add Sophgo sg2042 CLINT mswi
  dt-bindings: timer: Add Sophgo sg2042 CLINT timer
  dt-bindings: interrupt-controller: Add Sophgo SG2042 PLIC
  dt-bindings: riscv: Add T-HEAD C920 compatibles
  dt-bindings: riscv: add sophgo sg2042 bindings
  dt-bindings: vendor-prefixes: add milkv/sophgo
  riscv: Add SOPHGO SOC family Kconfig support
  riscv: dts: starfive: add assigned-clock* to limit frquency
  riscv: dts: starfive: Add JH7110 PWM-DAC support
  ...

Link: https://lore.kernel.org/r/20231016-filing-payroll-7aca51b8f1a3@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-10-18 16:03:52 +02:00
..
boot RISC-V Devicetrees for v6.7 2023-10-18 16:03:52 +02:00
configs riscv: defconfig: enable SOPHGO SoC 2023-10-07 11:17:01 +01:00
errata Merge patch series "Add non-coherent DMA support for AX45MP" 2023-09-08 11:24:34 -07:00
include riscv: errata: fix T-Head dcache.cva encoding 2023-09-12 13:58:40 -07:00
kernel riscv: kexec: Align the kexeced kernel entry 2023-09-12 13:58:39 -07:00
kvm RISC-V: KVM: Fix riscv_vcpu_get_isa_ext_single() for missing extensions 2023-09-21 15:04:01 +05:30
lib riscv: uaccess: Return the number of bytes effectively not copied 2023-08-16 07:30:06 -07:00
mm Merge patch series "riscv: Introduce KASLR" 2023-09-08 11:25:13 -07:00
net bpf, riscv: use prog pack allocator in the BPF JIT 2023-09-06 06:26:07 -07:00
purgatory riscv/purgatory: Disable CFI 2023-08-23 14:16:40 -07:00
tools riscv: Check relocations at compile time 2023-04-19 07:46:32 -07:00
Kbuild kexec: rename ARCH_HAS_KEXEC_PURGATORY 2023-08-18 10:18:54 -07:00
Kconfig riscv: Kconfig: Select DMA_DIRECT_REMAP only if MMU is enabled 2023-09-08 11:25:26 -07:00
Kconfig.debug RISC-V: Remove EARLY_PRINTK support 2018-12-17 10:23:46 -08:00
Kconfig.errata riscv: Kconfig.errata: Add dependency for RISCV_SBI in ERRATA_ANDES config 2023-09-08 11:25:28 -07:00
Kconfig.socs riscv: Add SOPHGO SOC family Kconfig support 2023-10-06 14:36:53 +01:00
Makefile riscv: Require FRAME_POINTER for some configurations 2023-08-23 09:07:26 -07:00
Makefile.postlink riscv: Use --emit-relocs in order to move .rela.dyn in init 2023-04-19 07:46:33 -07:00