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The CSI2 specification specifies a standard method to access camera sensor registers called "Camera Control Interface (CCI)". This uses either 8 or 16 bit (big-endian wire order) register addresses and supports 8, 16, 24 or 32 bit (big-endian wire order) register widths. Currently a lot of Linux camera sensor drivers all have their own custom helpers for this, often copy and pasted from other drivers. Add a set of generic helpers for this so that all sensor drivers can switch to a single common implementation. These helpers take an extra optional "int *err" function parameter, this can be used to chain a bunch of register accesses together with only a single error check at the end, rather than needing to error check each individual register access. The first failing call will set the contents of err to a non 0 value and all other calls will then become no-ops. Link: https://lore.kernel.org/linux-media/59aefa7f-7bf9-6736-6040-39551329cd0a@redhat.com/ Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Tommaso Merciai <tomm.merciai@gmail.com> Reviewed-by: Tommaso Merciai <tomm.merciai@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
126 lines
4.0 KiB
C
126 lines
4.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* MIPI Camera Control Interface (CCI) register access helpers.
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*
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* Copyright (C) 2023 Hans de Goede <hansg@kernel.org>
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*/
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#ifndef _V4L2_CCI_H
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#define _V4L2_CCI_H
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#include <linux/types.h>
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struct i2c_client;
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struct regmap;
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/**
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* struct cci_reg_sequence - An individual write from a sequence of CCI writes
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*
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* @reg: Register address, use CCI_REG#() macros to encode reg width
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* @val: Register value
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*
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* Register/value pairs for sequences of writes.
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*/
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struct cci_reg_sequence {
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u32 reg;
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u64 val;
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};
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/*
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* Macros to define register address with the register width encoded
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* into the higher bits.
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*/
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#define CCI_REG_ADDR_MASK GENMASK(15, 0)
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#define CCI_REG_WIDTH_SHIFT 16
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#define CCI_REG_WIDTH_MASK GENMASK(19, 16)
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#define CCI_REG8(x) ((1 << CCI_REG_WIDTH_SHIFT) | (x))
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#define CCI_REG16(x) ((2 << CCI_REG_WIDTH_SHIFT) | (x))
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#define CCI_REG24(x) ((3 << CCI_REG_WIDTH_SHIFT) | (x))
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#define CCI_REG32(x) ((4 << CCI_REG_WIDTH_SHIFT) | (x))
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#define CCI_REG64(x) ((8 << CCI_REG_WIDTH_SHIFT) | (x))
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/**
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* cci_read() - Read a value from a single CCI register
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*
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* @map: Register map to read from
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* @reg: Register address to read, use CCI_REG#() macros to encode reg width
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* @val: Pointer to store read value
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* @err: Optional pointer to store errors, if a previous error is set
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* then the read will be skipped
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*
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* Return: %0 on success or a negative error code on failure.
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*/
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int cci_read(struct regmap *map, u32 reg, u64 *val, int *err);
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/**
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* cci_write() - Write a value to a single CCI register
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*
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* @map: Register map to write to
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* @reg: Register address to write, use CCI_REG#() macros to encode reg width
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* @val: Value to be written
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* @err: Optional pointer to store errors, if a previous error is set
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* then the write will be skipped
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*
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* Return: %0 on success or a negative error code on failure.
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*/
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int cci_write(struct regmap *map, u32 reg, u64 val, int *err);
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/**
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* cci_update_bits() - Perform a read/modify/write cycle on
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* a single CCI register
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*
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* @map: Register map to update
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* @reg: Register address to update, use CCI_REG#() macros to encode reg width
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* @mask: Bitmask to change
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* @val: New value for bitmask
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* @err: Optional pointer to store errors, if a previous error is set
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* then the update will be skipped
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*
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* Note this uses read-modify-write to update the bits, atomicity with regards
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* to other cci_*() register access functions is NOT guaranteed.
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*
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* Return: %0 on success or a negative error code on failure.
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*/
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int cci_update_bits(struct regmap *map, u32 reg, u64 mask, u64 val, int *err);
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/**
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* cci_multi_reg_write() - Write multiple registers to the device
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*
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* @map: Register map to write to
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* @regs: Array of structures containing register-address, -value pairs to be
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* written, register-addresses use CCI_REG#() macros to encode reg width
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* @num_regs: Number of registers to write
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* @err: Optional pointer to store errors, if a previous error is set
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* then the write will be skipped
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*
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* Write multiple registers to the device where the set of register, value
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* pairs are supplied in any order, possibly not all in a single range.
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*
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* Use of the CCI_REG#() macros to encode reg width is mandatory.
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*
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* For raw lists of register-address, -value pairs with only 8 bit
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* wide writes regmap_multi_reg_write() can be used instead.
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*
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* Return: %0 on success or a negative error code on failure.
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*/
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int cci_multi_reg_write(struct regmap *map, const struct cci_reg_sequence *regs,
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unsigned int num_regs, int *err);
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#if IS_ENABLED(CONFIG_V4L2_CCI_I2C)
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/**
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* devm_cci_regmap_init_i2c() - Create regmap to use with cci_*() register
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* access functions
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*
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* @client: i2c_client to create the regmap for
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* @reg_addr_bits: register address width to use (8 or 16)
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*
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* Note the memory for the created regmap is devm() managed, tied to the client.
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*
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* Return: %0 on success or a negative error code on failure.
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*/
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struct regmap *devm_cci_regmap_init_i2c(struct i2c_client *client,
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int reg_addr_bits);
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#endif
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#endif
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