mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-28 05:24:47 +08:00
7925e89f54
This patch updates the in-kernel dts files according to the latest cpus and cpu bindings updates for ARM. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Shawn Guo <shawn.guo@linaro.org>
527 lines
13 KiB
Plaintext
527 lines
13 KiB
Plaintext
/*
|
|
* Copyright 2012 Freescale Semiconductor, Inc.
|
|
*
|
|
* The code contained herein is licensed under the GNU General Public
|
|
* License. You may obtain a copy of the GNU General Public License
|
|
* Version 2 or later at the following locations:
|
|
*
|
|
* http://www.opensource.org/licenses/gpl-license.html
|
|
* http://www.gnu.org/copyleft/gpl.html
|
|
*/
|
|
|
|
/include/ "skeleton.dtsi"
|
|
|
|
/ {
|
|
interrupt-parent = <&icoll>;
|
|
|
|
aliases {
|
|
gpio0 = &gpio0;
|
|
gpio1 = &gpio1;
|
|
gpio2 = &gpio2;
|
|
serial0 = &auart0;
|
|
serial1 = &auart1;
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <0>;
|
|
#size-cells = <0>;
|
|
|
|
cpu {
|
|
compatible = "arm,arm926ej-s";
|
|
device_type = "cpu";
|
|
};
|
|
};
|
|
|
|
apb@80000000 {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0x80000000 0x80000>;
|
|
ranges;
|
|
|
|
apbh@80000000 {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0x80000000 0x40000>;
|
|
ranges;
|
|
|
|
icoll: interrupt-controller@80000000 {
|
|
compatible = "fsl,imx23-icoll", "fsl,icoll";
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
reg = <0x80000000 0x2000>;
|
|
};
|
|
|
|
dma_apbh: dma-apbh@80004000 {
|
|
compatible = "fsl,imx23-dma-apbh";
|
|
reg = <0x80004000 0x2000>;
|
|
interrupts = <0 14 20 0
|
|
13 13 13 13>;
|
|
interrupt-names = "empty", "ssp0", "ssp1", "empty",
|
|
"gpmi0", "gpmi1", "gpmi2", "gpmi3";
|
|
#dma-cells = <1>;
|
|
dma-channels = <8>;
|
|
clocks = <&clks 15>;
|
|
};
|
|
|
|
ecc@80008000 {
|
|
reg = <0x80008000 0x2000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
gpmi-nand@8000c000 {
|
|
compatible = "fsl,imx23-gpmi-nand";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
|
|
reg-names = "gpmi-nand", "bch";
|
|
interrupts = <13>, <56>;
|
|
interrupt-names = "gpmi-dma", "bch";
|
|
clocks = <&clks 34>;
|
|
clock-names = "gpmi_io";
|
|
dmas = <&dma_apbh 4>;
|
|
dma-names = "rx-tx";
|
|
fsl,gpmi-dma-channel = <4>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ssp0: ssp@80010000 {
|
|
reg = <0x80010000 0x2000>;
|
|
interrupts = <15 14>;
|
|
clocks = <&clks 33>;
|
|
dmas = <&dma_apbh 1>;
|
|
dma-names = "rx-tx";
|
|
fsl,ssp-dma-channel = <1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
etm@80014000 {
|
|
reg = <0x80014000 0x2000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
pinctrl@80018000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,imx23-pinctrl", "simple-bus";
|
|
reg = <0x80018000 0x2000>;
|
|
|
|
gpio0: gpio@0 {
|
|
compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
|
|
interrupts = <16>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
gpio1: gpio@1 {
|
|
compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
|
|
interrupts = <17>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
gpio2: gpio@2 {
|
|
compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
|
|
interrupts = <18>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
duart_pins_a: duart@0 {
|
|
reg = <0>;
|
|
fsl,pinmux-ids = <
|
|
0x11a2 /* MX23_PAD_PWM0__DUART_RX */
|
|
0x11b2 /* MX23_PAD_PWM1__DUART_TX */
|
|
>;
|
|
fsl,drive-strength = <0>;
|
|
fsl,voltage = <1>;
|
|
fsl,pull-up = <0>;
|
|
};
|
|
|
|
auart0_pins_a: auart0@0 {
|
|
reg = <0>;
|
|
fsl,pinmux-ids = <
|
|
0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */
|
|
0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */
|
|
0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */
|
|
0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */
|
|
>;
|
|
fsl,drive-strength = <0>;
|
|
fsl,voltage = <1>;
|
|
fsl,pull-up = <0>;
|
|
};
|
|
|
|
auart0_2pins_a: auart0-2pins@0 {
|
|
reg = <0>;
|
|
fsl,pinmux-ids = <
|
|
0x01e2 /* MX23_PAD_I2C_SCL__AUART1_TX */
|
|
0x01f2 /* MX23_PAD_I2C_SDA__AUART1_RX */
|
|
>;
|
|
fsl,drive-strength = <0>;
|
|
fsl,voltage = <1>;
|
|
fsl,pull-up = <0>;
|
|
};
|
|
|
|
gpmi_pins_a: gpmi-nand@0 {
|
|
reg = <0>;
|
|
fsl,pinmux-ids = <
|
|
0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */
|
|
0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */
|
|
0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */
|
|
0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */
|
|
0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */
|
|
0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */
|
|
0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */
|
|
0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */
|
|
0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */
|
|
0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */
|
|
0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */
|
|
0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */
|
|
0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
|
|
0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
|
|
0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
|
|
0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */
|
|
0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N */
|
|
>;
|
|
fsl,drive-strength = <0>;
|
|
fsl,voltage = <1>;
|
|
fsl,pull-up = <0>;
|
|
};
|
|
|
|
gpmi_pins_fixup: gpmi-pins-fixup {
|
|
fsl,pinmux-ids = <
|
|
0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
|
|
0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
|
|
0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
|
|
>;
|
|
fsl,drive-strength = <2>;
|
|
};
|
|
|
|
mmc0_4bit_pins_a: mmc0-4bit@0 {
|
|
reg = <0>;
|
|
fsl,pinmux-ids = <
|
|
0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
|
|
0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
|
|
0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
|
|
0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
|
|
0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
|
|
0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
|
|
>;
|
|
fsl,drive-strength = <1>;
|
|
fsl,voltage = <1>;
|
|
fsl,pull-up = <1>;
|
|
};
|
|
|
|
mmc0_8bit_pins_a: mmc0-8bit@0 {
|
|
reg = <0>;
|
|
fsl,pinmux-ids = <
|
|
0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
|
|
0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
|
|
0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
|
|
0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
|
|
0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */
|
|
0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */
|
|
0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */
|
|
0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */
|
|
0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
|
|
0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
|
|
0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
|
|
>;
|
|
fsl,drive-strength = <1>;
|
|
fsl,voltage = <1>;
|
|
fsl,pull-up = <1>;
|
|
};
|
|
|
|
mmc0_pins_fixup: mmc0-pins-fixup {
|
|
fsl,pinmux-ids = <
|
|
0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
|
|
0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
|
|
>;
|
|
fsl,pull-up = <0>;
|
|
};
|
|
|
|
pwm2_pins_a: pwm2@0 {
|
|
reg = <0>;
|
|
fsl,pinmux-ids = <
|
|
0x11c0 /* MX23_PAD_PWM2__PWM2 */
|
|
>;
|
|
fsl,drive-strength = <0>;
|
|
fsl,voltage = <1>;
|
|
fsl,pull-up = <0>;
|
|
};
|
|
|
|
lcdif_24bit_pins_a: lcdif-24bit@0 {
|
|
reg = <0>;
|
|
fsl,pinmux-ids = <
|
|
0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */
|
|
0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */
|
|
0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */
|
|
0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */
|
|
0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */
|
|
0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */
|
|
0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */
|
|
0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */
|
|
0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */
|
|
0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */
|
|
0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */
|
|
0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */
|
|
0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */
|
|
0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */
|
|
0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */
|
|
0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */
|
|
0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */
|
|
0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */
|
|
0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */
|
|
0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */
|
|
0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */
|
|
0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */
|
|
0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */
|
|
0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */
|
|
0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */
|
|
0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */
|
|
0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */
|
|
0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */
|
|
>;
|
|
fsl,drive-strength = <0>;
|
|
fsl,voltage = <1>;
|
|
fsl,pull-up = <0>;
|
|
};
|
|
|
|
spi2_pins_a: spi2@0 {
|
|
reg = <0>;
|
|
fsl,pinmux-ids = <
|
|
0x0182 /* MX23_PAD_GPMI_WRN__SSP2_SCK */
|
|
0x0142 /* MX23_PAD_GPMI_RDY1__SSP2_CMD */
|
|
0x0002 /* MX23_PAD_GPMI_D00__SSP2_DATA0 */
|
|
0x0032 /* MX23_PAD_GPMI_D03__SSP2_DATA3 */
|
|
>;
|
|
fsl,drive-strength = <1>;
|
|
fsl,voltage = <1>;
|
|
fsl,pull-up = <1>;
|
|
};
|
|
};
|
|
|
|
digctl@8001c000 {
|
|
compatible = "fsl,imx23-digctl";
|
|
reg = <0x8001c000 2000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
emi@80020000 {
|
|
reg = <0x80020000 0x2000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
dma_apbx: dma-apbx@80024000 {
|
|
compatible = "fsl,imx23-dma-apbx";
|
|
reg = <0x80024000 0x2000>;
|
|
interrupts = <7 5 9 26
|
|
19 0 25 23
|
|
60 58 9 0
|
|
0 0 0 0>;
|
|
interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
|
|
"saif0", "empty", "auart0-rx", "auart0-tx",
|
|
"auart1-rx", "auart1-tx", "saif1", "empty",
|
|
"empty", "empty", "empty", "empty";
|
|
#dma-cells = <1>;
|
|
dma-channels = <16>;
|
|
clocks = <&clks 16>;
|
|
};
|
|
|
|
dcp@80028000 {
|
|
reg = <0x80028000 0x2000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
pxp@8002a000 {
|
|
reg = <0x8002a000 0x2000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ocotp@8002c000 {
|
|
compatible = "fsl,ocotp";
|
|
reg = <0x8002c000 0x2000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
axi-ahb@8002e000 {
|
|
reg = <0x8002e000 0x2000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
lcdif@80030000 {
|
|
compatible = "fsl,imx23-lcdif";
|
|
reg = <0x80030000 2000>;
|
|
interrupts = <46 45>;
|
|
clocks = <&clks 38>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ssp1: ssp@80034000 {
|
|
reg = <0x80034000 0x2000>;
|
|
interrupts = <2 20>;
|
|
clocks = <&clks 33>;
|
|
dmas = <&dma_apbh 2>;
|
|
dma-names = "rx-tx";
|
|
fsl,ssp-dma-channel = <2>;
|
|
status = "disabled";
|
|
};
|
|
|
|
tvenc@80038000 {
|
|
reg = <0x80038000 0x2000>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
apbx@80040000 {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0x80040000 0x40000>;
|
|
ranges;
|
|
|
|
clks: clkctrl@80040000 {
|
|
compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
|
|
reg = <0x80040000 0x2000>;
|
|
#clock-cells = <1>;
|
|
};
|
|
|
|
saif0: saif@80042000 {
|
|
reg = <0x80042000 0x2000>;
|
|
dmas = <&dma_apbx 4>;
|
|
dma-names = "rx-tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
power@80044000 {
|
|
reg = <0x80044000 0x2000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
saif1: saif@80046000 {
|
|
reg = <0x80046000 0x2000>;
|
|
dmas = <&dma_apbx 10>;
|
|
dma-names = "rx-tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
audio-out@80048000 {
|
|
reg = <0x80048000 0x2000>;
|
|
dmas = <&dma_apbx 1>;
|
|
dma-names = "tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
audio-in@8004c000 {
|
|
reg = <0x8004c000 0x2000>;
|
|
dmas = <&dma_apbx 0>;
|
|
dma-names = "rx";
|
|
status = "disabled";
|
|
};
|
|
|
|
lradc@80050000 {
|
|
compatible = "fsl,imx23-lradc";
|
|
reg = <0x80050000 0x2000>;
|
|
interrupts = <36 37 38 39 40 41 42 43 44>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spdif@80054000 {
|
|
reg = <0x80054000 2000>;
|
|
dmas = <&dma_apbx 2>;
|
|
dma-names = "tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@80058000 {
|
|
reg = <0x80058000 0x2000>;
|
|
dmas = <&dma_apbx 3>;
|
|
dma-names = "rx-tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
rtc@8005c000 {
|
|
compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
|
|
reg = <0x8005c000 0x2000>;
|
|
interrupts = <22>;
|
|
};
|
|
|
|
pwm: pwm@80064000 {
|
|
compatible = "fsl,imx23-pwm";
|
|
reg = <0x80064000 0x2000>;
|
|
clocks = <&clks 30>;
|
|
#pwm-cells = <2>;
|
|
fsl,pwm-number = <5>;
|
|
status = "disabled";
|
|
};
|
|
|
|
timrot@80068000 {
|
|
compatible = "fsl,imx23-timrot", "fsl,timrot";
|
|
reg = <0x80068000 0x2000>;
|
|
interrupts = <28 29 30 31>;
|
|
clocks = <&clks 28>;
|
|
};
|
|
|
|
auart0: serial@8006c000 {
|
|
compatible = "fsl,imx23-auart";
|
|
reg = <0x8006c000 0x2000>;
|
|
interrupts = <24 25 23>;
|
|
clocks = <&clks 32>;
|
|
dmas = <&dma_apbx 6>, <&dma_apbx 7>;
|
|
dma-names = "rx", "tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
auart1: serial@8006e000 {
|
|
compatible = "fsl,imx23-auart";
|
|
reg = <0x8006e000 0x2000>;
|
|
interrupts = <59 60 58>;
|
|
clocks = <&clks 32>;
|
|
dmas = <&dma_apbx 8>, <&dma_apbx 9>;
|
|
dma-names = "rx", "tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
duart: serial@80070000 {
|
|
compatible = "arm,pl011", "arm,primecell";
|
|
reg = <0x80070000 0x2000>;
|
|
interrupts = <0>;
|
|
clocks = <&clks 32>, <&clks 16>;
|
|
clock-names = "uart", "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
usbphy0: usbphy@8007c000 {
|
|
compatible = "fsl,imx23-usbphy";
|
|
reg = <0x8007c000 0x2000>;
|
|
clocks = <&clks 41>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|
|
|
|
ahb@80080000 {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0x80080000 0x80000>;
|
|
ranges;
|
|
|
|
usb0: usb@80080000 {
|
|
compatible = "fsl,imx23-usb", "fsl,imx27-usb";
|
|
reg = <0x80080000 0x40000>;
|
|
interrupts = <11>;
|
|
fsl,usbphy = <&usbphy0>;
|
|
clocks = <&clks 40>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|